EMTCG256-3G Datasheet, PDF (2/3 Pages) EM Microelectronic - MARIN SA – 256KB Flash Smart Card IC + Crypto

EM MICROELECTRONIC – MARIN SA
Theseus™ Gold 256 3G
EMTCG256-3G
Introduction
EMTCG256-3G is a member of the Theseus family of devices
designed specifically for smart card applications. It is software
compatible with the industry standard 8051 micro-controller,
to guarantee the maximum availability of qualified software.
The hardware implementation of the core is a modern design
not relying on microcode, with an increase of up to 4 times on
a standard 8051's clocks per instruction.
Security of the family of devices makes them particularly
suitable in electronic commerce and sensitive data areas.
This is accomplished in hardware, with not only protection
against out of parameter operation of the device, but
hardware memory management to protect against software
security attacks. The CPU clock is derived from its own
internal oscillator, so preventing attacks by clock
manipulation, or extrapolating program execution by
monitoring current variations on clock edges.
The need to support the emerging multifunction cards
requires that the device under software control can download
an application and run it when the device is in the field
embedded in a plastic card. This application can be in the
form of a script to be executed by an interpreter or as a raw
binary directly executed by the processor. The device has to
be protected against the downloading of attack software
designed to corrupt or uncover the working or data contained
in the device. Traditionally this has been a software function,
which relies on the total integrity of the embedded software.
The EMTCG256-3G implements the first level of protection in
hardware. This maximizes the security of the device, and
allows the reusability of developed certified code, by isolating
it from the actual hardware implementation of the device.
This protection mechanism allows for a Secure Operating
System to be embedded into the device at manufacture,
which has access rights to features of the device that are
denied to applications that can be loaded into the device at
manufacture or in the field.
The Secure Operating System allocates to each application
programme, areas of the memory resources of the device.
The hardware then ensures that when the application code is
executing only accesses to these designated spaces are
made.
An extension of application mode has been developed to
facilitate Java Card virtual machine integration.
With up to a 99KB (RAM+FLASH+ROM) of on chip memories
EMTCG256-3G eradicates the need for memory bank
switching either for data and code space. This is maximizing
computing performances as well as code density of you
application allowing Smart Card to integrate more features.
In systems where application isolation is not needed, the
security mechanism acts as a general protection unit trapping
software errors.
Non Volatiles Memories
The use of flash blocks of with 2kB increments configurable
for code or data, allows to address different larger market
range with a single product.
Serial interface
EMTCG256-3G offers a unique serial interface compliant with
the ISO 7816-3 specification with several modes
implemented allowing serial connections at 9600 up to 357K
bits per second at 3.57MHz. EMTCG256-3G supports T=0
asynchronous half duplex character transmission protocol,
T=1 asynchronous half duplex block transmission and a
proprietary T=14 protocol used for fast loading of Code into
the OTP by the card manufacturer. It handles minimum guard
time requirements between characters specified by ISO7816-
3 specification automatically. EMTCG256-3G is designed to
be compatible with the ISO7816-3 specification defining the
characteristics of Integrated Circuit Cards commonly referred
to as smart cards.
DES/TDES
High performance symmetric encryption / decryption
algorithm can be achieved using DES and Triple DES on chip
HW Accelerator, this engine could be used as well in EBC
and CBC modes. The intrinsic security of this DES
implementation can be reinforced using SPA/DPA protection
mechanisms to achieve very high level of security.
Random Number Generator
The on chip random number generator is fully Fips140-2
compliant, providing a rapid stream of truly random numbers.
This allows use of the random numbers generated beyond
just the provision of numbers for randomizing transmissions
or generating keys.
Clocks
EMTCG256-3G has its own internal oscillator this allows the
core of the device to be independent of the external clock.
The processor can also be clocked much faster than the IO
CLK signal. This ensures the elimination of fraudulent attacks
involving frequency jitter and unequal mark space ratios. The
internal clock generator is connected to the core via a divider
that is under the control of the software. This allows the
Operating System writer to control the trade off between
execution speed and power drawn by the device. Extending
battery life in hand help applications where slow interfaces
are involved.
Anti tampering
The EMTCG256-3G has extensive anti tampering provision
including the monitoring of the connection to the device to
ensure that deviations beyond a prescribed criteria result in
the device being closed down before its operating conditions
are violated.
On chip voltage regulators
Several on chip regulators isolate the various elements of the
device from variations and fluctuations in the supply voltage.
This allows elements to be characterized precisely, as they
operate at one fixed voltage, which in turn maximizes the
endurance of the device.
Technology
This product is using superior Flash memory SuperFlash
Technology licensed from SST and SuperFlash is a registered
trademark of SST (Silicon Storage Technology Inc.).
Copyright  2004, Rev A, EM Microelectronic-Marin SA
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