RMS132AW Datasheet, PDF (1/26 Pages) Emerging Memory & Logic Solutions Inc – 512K x 32Bits x 2Banks Low Power Synchronous DRAM

RMS132AW
Advance Information
512K x 32Bits x 2Banks Low Power Synchronous DRAM
Description
These RMS132AW are low power 33,554,432 bits CMOS Synchronous DRAM organized as 2 banks of 524,288 words x 32 bits. These
products are offering fully synchronous operation and are referenced to a positive edge of the clock. All inputs and outputs are
synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input
and output voltage levels are compatible with LVCMOS.
Features
ƒ JEDEC standard 3.0V/3.3V power supply.
• Auto refresh and self refresh.
• All pins are compatible with LVCMOS interface.
• 4K refresh cycle / 64ms.
• Programmable Burst Length and Burst Type.
- 1, 2, 4, 8 or Full Page for Sequential Burst.
- 4 or 8 for Interleave Burst.
• Programmable CAS Latency : 2,3 clocks.
• Programmable Driver Strength Control
- Full Strength or 1/2, 1/4 of Full Strength
• Deep Power Down Mode.
• All inputs and outputs referenced to the positive edge of the
system clock.
• Data mask function by DQM.
• Internal dual banks operation.
• Burst Read Single Write operation.
• Special Function Support.
- PASR(Partial Array Self Refresh)
- Auto TCSR(Temperature Compensated Self Refresh)
• Automatic precharge, includes CONCURRENT Auto Precharge
Mode and controlled Precharge.
Table1: Ordering Information
Part No.
Clock Freq.
RMS132AW-75E
133 MHz
Temperature
-25°C to 85°C
VDD/VDDQ
3.0V/3.0V
or
3.3V/3.3V
Interface
LVCMOS
Package
Wafer
Emerging Memory & Logic Solutions Inc.
4F Korea Construction Financial Cooperative B/D, 301-1 Yeon-Dong, Jeju-Si, Jeju-Do, Rep.of Korea Zip Code : 690-717
Tel : [phone] Fax : [phone]~1750 / Homepage : www.emlsi.com
The specifications of this device are subject to change without notice. For latest documentation see http://www.emlsi.com.
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