EM65100 Datasheet, PDF (46/75 Pages) ELAN Microelectronics Corp – 69 COM/ 101 SEG 4 Gray Level STN LCD Driver

EM65100
69 COM/ 101 SEG 4 Gray Level STN LCD Driver
LA6 LA5 LA4 LA3 LA2 LA1 LA0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
：
：
1
0
0
0
0
1
0
8.2.7 n Line Alternated Register Set
Line Address
0
1
66
D7 D6 D5 D4 D3 D2 D1 D0
0 1 1 0 N3 N2 N1 N0
CSB RS RDB WRB RE2 RE1 RE0
0110000
(At the tine of reset: {N3, N2, N1, N0}=0H, read address: 6H)
D7 D6 D5 D4 D3 D2 D1 D0
0 1 1 1 ^※ N6 N5 N4
CSB RS RDB WRB RE2 RE1 RE0
0110000
(At the time of reset: {N6, N5, N4}=0H, read address: 7H)
※ Mark shows “Don’t care”
The reverse line number of LCD alternated drive is required to set in the register. The line number has a limit, must keeps
between from 2 to 67 lines. The values set up by the alternated register become enable when NLIN control bit is “1”. When
NLIN control bit is “0”, alternated drive waveform reverses by each frame is generated.
N6 N5 N4 N3 N2 N1 N0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
：
：
1
0
0
0
0
1
0
Alternated Timing
(i)
NLIN=”0” (in case of 1/69 DUTY Display)
1st Line 2nd Line 3rd Line
Line Address
-
2
67
68st Line 69th Line 1st Line
LP
FLM
M
* This specification is subject to be changed without notice.
2005/3/8 (V0.6) 46