EPL65132 Datasheet, PDF (33/64 Pages) ELAN Microelectronics Corp – 65 COM / 132 SEG LCD Driver

EPL65132
65 COM / 132 SEG LCD Driver
LCD Bias
1/9
1/8.5
1/8
1/7.5
1/7
1/6.5
1/6
1/5.5
1/5
1/4.5
1/4
V1
0.890*V0
0.880*V0
0.875*V0
0.865*V0
0.855*V0
0.845*V0
0.835*V0
0.820*V0
0.800*V0
0.780*V0
0.750*V0
V2
0.780*V0
0.765*V0
0.750*V0
0.735*V0
0.715*V0
0.690*V0
0.665*V0
0.635*V0
0.600*V0
0.555*V0
0.500*V0
V3
0.220*V0
0.235*V0
0.250*V0
0.265*V0
0.285*V0
0.310*V0
0.335*V0
0.365*V0
0.400*V0
0.445*V0
0.500*V0
V4
0.110*V0
0.120*V0
0.125*V0
0.135*V0
0.145*V0
0.155*V0
0.165*V0
0.180*V0
0.200*V0
0.220*V0
0.250*V0
Different duty radio requires different bias level. For optimum bias level, B_L can be
calculated from:
B_L =
1
Duty ratio + 1
Changing the bias system from the optimum will have a consequence on the contrast
and viewing angle.
The LCD Bias affects the display quality. But for the purpose of reducing the current
consumption, the unsuitable bias may be selected. Hence, the LCD Bias could be
selected by “Select LCD bias” instruction.
7.5 LCD Display Circuits
Display
Timing
Generator
Circuit
FR
CL
/DOF
FRS
M/S
Oscillator
CLS
OSC
Figure 19 LCD Display Circuit
Product Specification (V1.8) 01.12.2006
27
(This specification is subject to change without further notice)