EM73461A Datasheet, PDF (31/33 Pages) ELAN Microelectronics Corp – 4-BIT MICRO-CONTROLLER FOR LCD PRODUCT

(8) Bit manipulation
EM73461A
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
Preliminary
Mnemonic Object code (binary) Operation description
CLM b
CLP p,b
CLPL
CLR y,b
SEM b
SEP p,b
SEPL
SET y,b
TF y,b
TFA b
TFM b
TFP p,b
TFPL
TT y,b
TTP p,b
1111 00bb
0110 1101 11bb pppp
0110 0000
0110 1100 11bb yyyy
1111 01bb
0110 1101 01bb pppp
0110 0010
0110 1100 01bb yyyy
0110 1100 00bb yyyy
1111 10bb
1111 11bb
0110 1101 00bb pppp
0110 0001
0110 1100 10bb yyyy
0110 1101 10bb pppp
RAM[HL]_b←0
PORT[p]_b←0
PORT[LR_3-2+4]LR_1-0←0
RAM[y]_b←0
RAM[HL]_b←1
PORT[p]_b←1
PORT[LR_3-2+4]LR_l-0←1
RAM[y]_b←1
SF←RAM[y]_b'
SF←Acc_b'
SF←RAM[HL]_b'
SF←PORT[p]_b'
SF←PORT[LR_3-2+4]LR_1-0'
SF←RAM[y]_b
SF←PORT[p]_b
(9) Subroutine
Byte Cycle
Flag
C ZS
1
1
- -1
2
2
- -1
1
2
- -1
2
2
- -1
1
1
- -1
2
2
- -1
1
2
- -1
2
2
- -1
2
2
- -*
1
1
- -*
1
1
- -*
2
2
- -*
1
2
- -*
2
2
- -*
2
2
- -*
Mnemonic Object code (binary) Operation description
Byte Cycle Flag
C ZS
LCALL a 0100 0aaa aaaa aaaa STACK[SP]←PC,
2
2
- --
SP←SP -1, PC←a
SCALL a 1110 nnnn
STACK[SP]←PC,
1
2
- --
SP←SP - 1, PC←a,
a = 8n +6 (n=1~15),0086h (n =0)
RET
0100 1111
SP←SP + 1, PC←STACK[SP] 1
2
- --
(10) Input/output
Mnemonic Object code (binary) Operation description
INA p
INM p
OUT #k,p
OUTA p
OUTM p
0110 1111 0100 pppp
0110 1111 1100 pppp
0100 1010 kkkk pppp
0110 1111 000p pppp
0110 1111 100p pppp
Acc←PORT[p]
RAM[HL]←PORT[p]
PORT[p]←k
PORT[p]←Acc
PORT[p]←RAM[HL]
Byte Cycle Flag
C ZS
2
2
- Z Z'
2
2
- - Z'
2
2
- -1
2
2
- -1
2
2
- -1
(11) Flag manipulation
Mnemonic Object code (binary) Operation description
CGF
SGF
TFCFC
0101 0111
0101 0101
0101 0011
GF←0
GF←1
SF←CF', CF←0
Byte Cycle Flag
C ZS
1
1
- -1
1
1
- -1
1
1
0 -*
* This specification are subject to be changed without notice.
1.5.2001 31