EM65571 Datasheet, PDF (26/118 Pages) ELAN Microelectronics Corp – 130COM / 128SEG 65K Color STN LCD Driver

EM65571
130COM/128SEG 65K Color STN LCD Driver
CSB
SDA
SCL
RS
D7 D6
D5
D4
D3
D2
D1
D0
1
2
3
4
5
6
7
8
9
Figure 5. 3-wire Type Serial Interface
7.2 Data Write to Display RAM and Control Register
The data write to display RAM and Control Register use almost the same
procedure, only different settings of RS that select access to the object.
RS = “L”: Display RAM data
RS = “H”: Control register data
In the case of the 80-family MPU, the data is written at the rising edge of WRB. In
the case of the 68-family MPU, the data is written at the falling edge of signal E.
Data Write Operation
D0~D7
(D0~D15)
WRB
Data0
Data1
Data2
Data3
Data4
RS
Write
Destination
Write to Control Register
Write to Display RAM
Figure 6. Data Write Operation
7.3 Internal Register Read
In the case of display RAM read operation, you need to perform a dummy read one
time. The designated address data is not output to read operation immediately
after the address is set to AX or AY register, but is output when the second data is
read. Dummy read is always required one time after an address set and write
cycle.
Read Display RAM Operation
WRB
D0~D7
(D0~D15)
RDB
n
Address set (AX,AY)
Address = n
***
Dummy
Read
RS
n
Data Read
Address=n
n+1
Data Read
Address=n+1
n+2
Data Read
Address=n+2
Figure 7. Read Display RAM Operation
20 •
Product Specification (V1.0) 08.04.2005
(This specification is subject to change without further notice)