EM65567 Datasheet, PDF (19/93 Pages) ELAN Microelectronics Corp – 66 COM/ 96 SEG 256 Color STN LCD Driver

EM65567
66 COM/ 96 SEG 256 Color STN LCD Driver
7. Functional Description
7.1 MPU Interface
7.1.1 Selection of Interface Type
The EM65567 transfers data through 8-bit parallel I/O (D7-D0), 16-bit parallel I/O (D15-D0) or serial data input (SDA, SCL).
The parallel interface or serial interface can select by state of P/S pin. When select serial interface, data reading cannot be
performed, only data writing can operate.
P/S I/F Type CSB RS RDB WRB M86
H Parallel CSB RS RDB WRB M86
L Serial CSB RS
-
-
-
SDA
-
SDA
SCL
Data
- D7~D0 (D15~D0)
SCL
-
7.1.2 Parallel Input
When parallel interface is selected with the P/S pin, the EM65567 allows data to be transferred in parallel to an 8-bit/16-bit
Preliminary ^{MPU through the data bus. For the 8-bit/16-bit MPU, either the 80-family MPU interface or the 68-family MPU interface can}
be selected with the m86 pin.
M86 MPU Type
CSB RS RDB WRB
Data
H 68-family MPU CSB RS
E
R/WB D7~D0 (D15~D0)
L 80-family MPU CSB RS RDB WRB D0~D7 (D15~D0)
7.1.3 Read/Write functions of Register and display RAM
The EM65567 have four read/write functions at parallel interface mode. Each read/write function select by combinations of
RS, RDB and WRB signals.
RS
68-family
R/WB
80-family
RDB
WRB
Function
1
1
0
1 Read internal Register
1
0
1
0 Write internal Register
0
1
0
0
0
1 Read display data
1
0 Write display data
7.1.4 Serial Interface
The serial interface of EM65567 can accept inputs of SDA and SCL in the state of chip select (CSB=”L”). When not in the
state of chip select. The internal shift register and counter are reset in the initial condition. Serial data SDA are input
sequentially in order of D7 to D0 at the rising of serial clock (SCL) and are converted into 8-bit parallel data (by serial to
parallel conversion) at the rising edge of the 8^th serial clock, being processed in accordance with the data. The identification
whether are serial data inputs (SDA) are display data or control register data is judged by input to RS pin.
RS = “L”: display RAM data
RS = “H”: control register data
After completing 8-bit data transferring, or when making no access, be sure to set serial clock input (SCL) to “L”. Cares of
SDA and SCL signals against external noise should be taken in board wiring. To prevent transfer error due to external noise,
release chip select (CSB = “H”) every completion of 8-bit data transferring.
* This specification is subject to be changed without notice. 19
2003/1/9 (V0.1)