EM39LV800 Datasheet, PDF (16/25 Pages) ELAN Microelectronics Corp – 8M Bits (512Kx16) Flash Memory

Toggle Bit Timing Diagram
EM39LV800
8M Bits (512Kx16) Flash Memory
SPECIFICATION
A18~A0
CE#
OE#
W E#
DQ6
TCE
TOEH ^TOE
TOES
Two Read Cycles
W ith Same Outputs
Figure 5: Toggle Bit Timing Diagram
WE# Controlled Chip-Erase Timing Diagram
A18~A0
5555
Six-Byte Code For Chip-Erase
2AAA 5555 5555 2AAA
5555
CE#
OE#
W E#
TWP
DQ15-0
XXAA _{XX55 XX80 XXAA XX55 XX10}
SW0 SW1 SW2 SW3 SW4 SW5
TSCE
Note: This device also supports CE# controlled Chip-Erase operation. The WE#and CE#
signals are interchageable as long as minimum timings are met.((SSeeeeTTaabblele1134).)
X can be VIL or VIH, but no other value.
Figure 6: WE# Controlled Chip-Erase Timing Diagram
This specification is subject to change without further notice. (04.09.2004 V1.0)
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