EM78862B Datasheet, PDF (15/40 Pages) ELAN Microelectronics Corp – 8-Bit RISC Type Microprocessor

EM78862B
8-Bit RISC Type Microprocessor
6.1.16 RF (Interrupt Status Register)
Bit 7
INT3
Bit 6
0
Bit 5
C8_2
Bit 4
C8_1
Bit 3
INT2
Bit 2
INT1
Bit 1
INT0
Bit 0
TCIF
Bit 0: (TCIF) TCC timer overflow interrupt flag. Set when TCC timer overflows.
Bit 1: (INT0) External INT0 pin interrupt flag
Bit 2: (INT1) External INT1 pin interrupt flag
Bit 3: (INT2) External INT2 pin interrupt flag
Bit 4: (C8_1) Internal 8 bit counter interrupt flag
Bit 5: (C8_2) Internal 8 bit counter interrupt flag
Bit 6: Unused. Clear to ‘0.’
Bit 7: (INT3) External INT3 pin interrupt flag
NOTE
1. “1” means interrupt request; “0” means non-interrupt
2. Refer to Section 6.7 (Interrupt) for reference on high to low edge trigger
3. IOCF is the interrupt mask register. You can read and clear this register.
6.1.17 R10 ~ R1F and R20 ~ R3F (General Purpose Register)
R10 ~ R1F & R20 ~ R3F (Banks 0~3) are general-purpose registers.
6.2 Special Purpose Registers
6.2.1 A (Accumulator, ACC)
Internal data transfer, or instruction operand holding. This is not an addressable register.
6.2.2 CONT (Control Register)
Bit 7
Bit 6
INT_EDGE INT
Bit 5
TS
Bit 4
-
Bit 3
PAB
Bit 0 ~ 2: (PSR0 ~ PSR2) TCC/WDT pre-scaler bits
PSR2
0
0
0
0
1
1
1
1
PSR1
0
0
1
1
0
0
1
1
PSR0
0
1
0
1
0
1
0
1
Bit 2
PSR2
Bit 1
PSR1
Bit 0
PSR0
TCC Rate
1:2
1:4
1:8
1:16
1:32
1:64
1:128
1:256
WDT Rate
1:1
1:2
1:4
1:8
1:16
1:32
1:64
1:128
This specification is subject to change without further notice.
Mar.01.2005 (V1.1)11 of 36