EM78451 Datasheet, PDF (14/54 Pages) ELAN Microelectronics Corp – 8-Bit Microcontroller

EM78451
8-Bit Microcontroller
4.1.13 RF (PWP: Pulse width preset register)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x0F PWP/RF PWP7 PWP6 PWP5 PWP4 PWP3 PWP2 PWP1 PWP0
PWP7~PWP0 are the bit sets of pulse width preset in advance for the desired baud
clock width.
4.1.14 R20~R3E (General Purpose Register)
RA~R1F, and R20~R3E (including Banks 0~3) are general-purpose registers.
4.1.15 R3F (Interrupt Status Register)
Address Name Bit 7
0x3F ISR/R3F -
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3 Bit 2
TM1IF SPIIF
Bit 1
EXIF
Bit 0
TCIF
Bit 0 (TCIF) TCC timer overflow interrupt flag. Set as TCC overflow; flag cleared by
software.
Bit 1 (EXIF) External interrupt flag. Set by falling edge on /INT pin, flag cleared by
software
Bit 2 (SPIIF) SPI interrupt flag. Set by completion of data transmission, flag cleared by
software.
Bit 3 (TM1IF) Timer1 interrupt flag. Set by the comparator at Timer1 application, flag
cleared by software.
Bits 2~7 are not used and read as “0”.
"1" means interrupt request, "0" means non-interrupt.
R3F can be cleared by instruction, but cannot be set by instruction.
IOCF is the interrupt mask register.
Note that to read R3F will result of "logic AND" of R3F and IOCF.
4.2 Special Purpose Registers
4.2.1 A (Accumulator)
Internal data transfer, or instruction operand holding.
A non-addressable register.
4.2.2 CONT (Control Register)
7
6
5
/PHEN
/INT
-
4
3
-
PAB
2
PSR2
1
PSR1
0
PSR0
10 •
Product Specification (V1.2) 05.27.2004
(This specification is subject to change without further notice)