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| EBE25UD6ABFA Datasheet, PDF (8/22 Pages) Elpida Memory – 256MB Unbuffered DDR2 SDRAM DIMM | |||
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EBE25UD6ABFA
Block Diagram
/CS0
/DQS0
DQS0
DM0
DQ0 to DQ7
/DQS1
DQS1
DM1
DQ8 to DQ15
RS1
RS1
RS1
8 RS1
RS1
RS1
RS1
8 RS1
/CS
/LDQS
LDQS
LDM
I/O0 to I/O7
/UDQS
D0
UDQS
UDM
I/O8 to I/O15
/DQS4
DQS4
DM4
DQ32 to DQ39
/DQS5
DQS5
DM5
DQ40 to DQ47
RS1
RS1
RS1
8 RS1
RS1
RS1
RS1
8 RS1
/CS
/LDQS
LDQS
LDM
I/O0 to I/O7
D2
/UDQS
UDQS
UDM
I/O8 to I/O15
/DQS2
DQS2
DM2
DQ16 to DQ23
/DQS3
DQS3
DM3
DQ24 to DQ31
RS1
RS1
RS1
8 RS1
RS1
RS1
RS1
8 RS1
/CS
/LDQS
LDQS
LDM
I/O0 to I/O7
/UDQS
D1
UDQS
UDM
I/O8 to I/O15
/DQS6
DQS6
DM6
DQ48 to DQ55
/DQS7
DQS7
DM7
DQ56 to DQ63
RS1
RS1
RS1
8 RS1
RS1
RS1
RS1
8 RS1
/CS
/LDQS
LDQS
LDM
I/O0 to I/O7
D3
/UDQS
UDQS
UDM
I/O8 to I/O15
RS2
BA0 to BA1
RS2
A0 to A12
RS2
/RAS
RS2
/CAS
RS2
/WE
CKE0
ODT0
BA0 to BA1: SDRAMs (D0 to D3)
A0 to A12: SDRAMs (D0 to D3)
/RAS: SDRAMs (D0 to D3)
/CAS: SDRAMs (D0 to D3)
/WE: SDRAMs (D0 to D3)
CKE: SDRAMs (D0 to D3)
ODT: SDRAMs (D0 to D3)
VDDSPD
VREF
VDD
VSS
SPD
SDRAMs (D0 to D3)
SDRAMs (D0 to D3) VDD and VDDQ
SDRAMs (D0 to D3) SPD
* D0 to D3 : 512M bits DDR2 SDRAM
U0 : 2k bits EEPROM
Rs1 : 22â¦
Rs2 : 10â¦
Serial PD
SCL
SCL
SDA
SDA
SA0
A0 U0
SA1
A1
SA2
A2 WP
Notes :
1. DQ wiring may be changed within a byte.
2. DQ, DQS, /DQS, ODT, DM, CKE, /CS relationships
must be meintained as shown.
3. Refer to the appropriate clock wiring topology under
the DIMM wiring details section of this document.
Preliminary Data Sheet E0534E11 (Ver. 1.1)
8
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