MC-4532CC727 Datasheet, PDF (6/16 Pages) NEC – 32M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE

MC-4532CC727
DC Characteristics (Recommended Operating Conditions Unless Otherwise Noted)
Parameter
Symbol
Test condition
MIN. MAX. Unit Notes
Operating current
ICC1 _{Burst length = 1}
tRC ≥ tRC(MIN.), IO = 0 mA
/CAS latency = 2
/CAS latency = 3
1,170 mA 1
1,215
Precharge standby current in ICC2P CKE ≤ VIL(MAX.), tCK = 15 ns
18 mA
power down mode
ICC2PS CKE ≤ VIL(MAX.), tCK = ∞
18
Precharge standby current in ICC2N CKE ≥ VIH(MIN.), tCK = 15 ns, /CS ≥ VIH(MIN.),
non power down mode
Input signals are changed one time during 30 ns.
ICC2NS CKE ≥ VIH(MIN.), tCK = ∞
Input signals are stable.
Active standby current in
ICC3P CKE ≤ VIL(MAX.), tCK = 15 ns
360 mA
144
90 mA
power down mode
ICC3PS CKE ≤ VIL(MAX.), tCK = ∞
72
Active standby current in
non power down mode
ICC3N CKE ≥ VIH(MIN.), tCK = 15 ns, /CS ≥ VIH(MIN.),
Input signals are changed one time during 30 ns.
540 mA
ICC3NS CKE ≥ VIH(MIN.), tCK = ∞ , Input signals are stable.
360
Operating current
ICC4 tCK ≥ tCK(MIN.)
/CAS latency = 2
1,350 mA 2
(Burst mode)
IO = 0 mA
/CAS latency = 3
1,665
CBR (Auto) refresh current
ICC5 tRC ≥ tRC(MIN.)
/CAS latency = 2
2,340 mA 3
/CAS latency = 3
2,430
Self refresh current
ICC6 CKE ≤ 0.2 V
36 mA
Input leakage current
II(L) VI = 0 to 3.6 V, All other pins not under test = 0 V
– 18 + 18 µA
CKE1 –500 +500 µA
Output leakage current
IO(L) DOUT is disabled, VO = 0 to 3.6 V
– 3 + 3 µA
High level output voltage
VOH IO = – 4.0 mA
2.4
V
Low level output voltage
VOL IO = + 4.0 mA
0.4 V
Notes 1. ICC1 depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, ICC1 is measured on condition that addresses are changed only one time during tCK (MIN.).
2. ICC4 depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, ICC4 is measured on condition that addresses are changed only one time during tCK (MIN.).
3. ICC5 is measured on condition that addresses are changed only one time during tCK (MIN.).
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Data Sheet E0052N20