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EBE21UE8AEWA Datasheet, PDF (6/30 Pages) Elpida Memory – 2GB Unbuffered DDR2 SDRAM DIMM
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EBE21UE8AEWA
Byte No.
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
Function described
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Hex value Comments
Maximum data access time (tAC)
from clock at CL = X − 2
0 1 0 1 0 0 0 0 50H
-8G (CL = 4)
-6E (CL = 3)
0 1 1 0 0 0 0 0 60H
0.5ns*1
0.6ns*1
Minimum row precharge time (tRP) 0 0 1 1 1 1 0 0 3CH
Minimum row active to row active
delay (tRRD)
00
01
11
10
1EH
Minimum /RAS to /CAS delay (tRCD) 0 0 1 1 1 1 0 0 3CH
15ns
7.5ns
15ns
Minimum active to precharge time
(tRAS)
0
0
1
0
1
1
0
1
2DH
Module rank density
0 0 0 0 0 0 0 1 01H
45ns
1G bytes
Address and command setup time
before clock (tIS)
0 0 0 1 0 1 1 1 17H
-8G
-6E
0 0 1 0 0 0 0 0 20H
Address and command hold time
after clock (tIH)
-8G
0 0 1 0 0 1 0 1 25H
-6E
0 0 1 0 0 1 1 1 27H
Data input setup time before clock
(tDS)
0 0 0 0 0 1 0 1 05H
-8G
-6E
0 0 0 1 0 0 0 0 10H
Data input hold time after clock (tDH)
-8G
0
0
0
1
0
0
1
0
12H
-6E
0 0 0 1 0 1 1 1 17H
Write recovery time (tWR)
0 0 1 1 1 1 0 0 3CH
0.17ns*1
0.20ns*1
0.25ns*1
0.27ns*1
0.05ns*1
0.10ns*1
0.12ns*1
0.17ns*1
15ns*1
Internal write to read command delay
(tWTR)
0
0
0
1
1
1
1
0
1EH
Internal read to precharge command
delay (tRTP)
0
0
0
1
1
1
1
0
1EH
Memory analysis probe
characteristics
0 0 0 0 0 0 0 0 00H
Extension of Byte 41 and 42
0 0 0 0 0 1 1 0 06H
Active command period (tRC)
0 0 1 1 1 1 0 0 3CH
7.5ns*1
7.5ns*1
TBD
60ns*1
Auto refresh to active/
Auto refresh command cycle (tRFC)
0
1
1
1
1
1
1
1
7FH
SDRAM tCK cycle max. (tCK max.) 1 0 0 0 0 0 0 0 80H
127.5ns*1
8ns*1
Dout to DQS skew
-8G
-6E
Data hold skew (tQHS)
-8G
-6E
0 0 0 1 0 1 0 0 14H
0 0 0 1 1 0 0 0 18H
0 0 0 1 1 1 1 0 1EH
0 0 1 0 0 0 1 0 22H
0.20ns*1
0.24ns*1
0.30ns*1
0.34ns*1
PLL relock time
0 0 0 0 0 0 0 0 00H
Undefined
Preliminary Data Sheet E1294E10 (Ver. 1.0)
6
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