EBJ41HF4B1QA Datasheet, PDF (5/21 Pages) Elpida Memory – 4GB VLP Registered DDR3 SDRAM DIMM

Pin Description
Pin name
A0 to A15
A10 (AP)
A12 (/BC)
BA0, BA1, BA2
DQ0 to DQ63
CB0 to CB7
/RAS
/CAS
/WE
/CS0, /CS1
CKE0, CKE1
CK0, CK1
/CK0, /CK1
DQS0 to DQS17, /DQS0 to /DQS17
SCL
SDA
SA0, SA1, SA2
VDD
VDDSPD
VREFCA
VREFDQ
VSS
VTT
/RESET
ODT0, ODT1
Par_In
/Err_Out
/Event
NC
EBJ41HF4B1QA
Function
Address input
Row address
Column address
Auto precharge
A0 to A13
A0 to A9, A11
Burst chop
Bank select address
Data input/output
Check bit (Data input/output)
Row address strobe command
Column address strobe command
Write enable
Chip select
Clock enable
Clock input
Differential clock input
Input and output data strobe
Clock input for serial PD
Data input/output for serial PD
Serial address input
Power for internal circuit
Power for serial EEPROM
Reference voltage for CA
Reference voltage for DQ
Ground
Termination Voltage
Set DRAM to known state
ODT control
Parity bit for the Address and Control bus
Parity error found on the Address and Control bus
Temperature event pin
No connection
Data Sheet E1265E40 (Ver.4.0)
5