EDS1216AHTA-LI Datasheet, PDF (37/50 Pages) Elpida Memory – 128M bits SDRAM WTR (Wide Temperature Range)

EDS1216AHTA-LI
Write command to Precharge command interval (same bank)
When the precharge command is executed for the same bank as the write command that preceded it, the minimum
interval between the two commands is 1 clock. However, if the burst write operation is unfinished, the input data
must be masked by means of UDQM and LDQM for assurance of the clock defined by tDPL.
CLK
Command
UDQM
LDQM
DQ
WRIT
PRE/PALL
in A0
in A1
in A2
E tDPL
WRITE to PRECHARGE Command Interval (same bank) (BL = 4 (To stop write operation))
CLK
O_Command
UDQM
L^LDQM
WRIT
PRE/PALL
DQ
in A0
in A1
in A2
in A3
tDPL
Product ^{WRITE to PRECHARGE Command Interval (same bank) (BL = 4 (To write all data))}
Data Sheet E1161E20 (Ver. 2.0)
37