HM534253B Datasheet, PDF (34/45 Pages) Elpida Memory – 1 M VRAM (256-kword x 4-bit)

HM534253B Series
Flash Write Cycle
RAS
CAS
Address
WE
I/O
(Output)
I/O
(Input)
DT/OE
DSF
t CRP
t RCD
tASR t_RAH
Row
tWS t_WH
t OFF1
t CDD
t OFF2
t ODD
t DTS
t MS
t MH
Mask Data
t DTH
tFSR t_RFH
Block Write Cycle
t RC
t RAS
t RP
High-Z
RAS
CAS
Address
WE
t _CSH
t RCD
t CAS
tASR tRAH _tASC t_CAH
Row
Column
A2-A8
t WS
t WH
*1
t _RC
t _RASP
t _PC
t CP
t _CAS
tASC t_CAH
Column
A2-A8
t _CP
t RSH
t _CAS
tASC t_CAH
Column
A2-A8
t _RP
t _CRP
I/O
(Output)
I/O
(Input)
DT/OE
DSF
t MS
tMH ^tDS
t DH
I/O
Mask
Address
Mask
t DTS
t DTH
tFSR tRFH ^tFSC
t CFH
High-Z
t DS
t DH
Address
Mask
t DS
t DH
Address
Mask
t FSC
t CFH
t FSC
t CFH
Note: 1. This cycle becomes a normal block write cycle when WE is high and a mask block write cycle
when WE is low.
Data Sheet E0165H10
34