EDE2508AEBG Datasheet, PDF (22/77 Pages) Elpida Memory – 256M bits DDR2 SDRAM

EDE2508AEBG, EDE2516AEBG
Single-ended DQS
DQS
VDDQ
VIH (AC) min.
VIH (DC) min.
VREF (DC)
VIL (DC) max.
VIL (AC) max.
VSS
Differential DQS, /DQS
CK, /CK
DQS
CK
/DQS
/CK
VDD
tDS1 tDH1
tDS tDH
tIS tIH
tDS1 tDH1
tDS tDH
tIS tIH
VIH (AC) min.
VIH (DC) min.
VREF (DC)
VREF to AC
region
DC to VREF
region
nominal
slew rate
VIL (DC) max.
VIL (AC) max.
nominal
slew rate
DC to VREF
region
VREF to AC
region
VSS
ΔTFS
ΔTRH ΔTRS
ΔTFH
Setup slew rate
Falling signal
=
VREF (DC) - VIL (AC) max.
ΔTFS
Setup slew rate
Rising signal
=
VIH (AC) min. - VREF (DC)
ΔTRS
Hold slew rate
Rising signal
VREF (DC) - VIL (DC) max.
=
ΔTRH
Hold slew rate
Falling signal
VIH (DC) min. - VREF (DC)
=
ΔTFH
Slew Rate Definition Nominal
Data Sheet E1175E20 (Ver. 2.0)
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