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EDE1108AJBG-8E-F Datasheet, PDF (16/75 Pages) Elpida Memory – 1G bits DDR2 SDRAM | |||
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EDE1108AJBG, EDE1116AJBG
11. When the device is operated with input clock jitter, this parameter needs to be derated by the actual
tJIT(per) of the input clock. (output deratings are relative to the SDRAM input clock.)
For example, if the measured jitter into a DDR2-667 SDRAM has tJIT(per) min. = â72ps and
tJIT(per) max. = +93ps, then tRPRE min.(derated) = tRPRE min. + tJIT(per) min. = 0.9 Ã tCK(avg) â 72ps
= +2178ps and tRPRE max.(derated) = tRPRE max. + tJIT(per) max. = 1.1 Ã tCK(avg) + 93ps = +2843ps.
12. When the device is operated with input clock jitter, this parameter needs to be derated by the actual
tJIT(duty) of the input clock. (output deratings are relative to the SDRAM input clock.)
For example, if the measured jitter into a DDR2-667 SDRAM has tJIT(duty) min. = â72ps and
tJIT(duty) max. = +93ps, then tRPST min.(derated) = tRPST min. + tJIT(duty) min. = 0.4 Ã tCK(avg) â
72ps = +928ps and tRPST max.(derated) = tRPST max. + tJIT(duty) max. = 0.6 Ã tCK(avg) + 93ps =
+1592ps.
13. Refer to the Clock Jitter table.
14. tWTR is at least two clocks (2 Ã tCK or 2 Ã nCK) independent of operation frequency.
15. tMOD max. = 12ns only applies when changing ODT value. (E.g. Changing ODT value from Rtt = 50⦠to
Rtt = 75â¦.) If ODT is disabled and then ODT is turned on, tMOD max. = 8nCK.
Data Sheet E1732E21 (Ver.2.1)
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