EDS2532JEBH-6B Datasheet, PDF (15/50 Pages) Elpida Memory – 256M bits SDRAM

EDS2532JEBH-6B
Function Truth Table
The following table shows the operations that are performed when each command is issued in each mode of the
SDRAM.
The following table assumes that CKE is high.
Current state
/CS /RAS /CAS /WE Address
Command
Operation
Precharge
Idle
Row active
H
×
×
×
×
DESL
Enter IDLE after tRP
L
H
H
H
×
NOP
Enter IDLE after tRP
L
H
H
L
×
BST
ILLEGAL
L
H
L
H
BA, CA, A10 READ/READA
ILLEGAL*³
L
H
L
L
BA, CA, A10 WRIT/WRITA
ILLEGAL*³
L
L
H
H
BA, RA
ACT
ILLEGAL*³
L
L
H
L
BA, A10
PRE, PALL
NOP*⁵
L
L
L
H
×
REF, SELF
ILLEGAL
L
L
L
L
MODE
MRS
ILLEGAL
L
L
L
L
MODE
EMRS
ILLEGAL
H
×
×
×
×
DESL
NOP
L
H
H
H
×
NOP
NOP
L
H
H
L
×
BST
ILLEGAL
L
H
L
H
BA, CA, A10 READ/READA
ILLEGAL*⁴
L
H
L
L
BA, CA, A10 WRIT/WRITA
ILLEGAL*⁴
L
L
H
H
BA, RA
ACT
Bank and row active
L
L
H
L
BA, A10
PRE, PALL
NOP
L
L
L
H
×
L
L
L
L
MODE
L
L
L
L
MODE
REF, SELF
MRS
EMRS
Refresh
Mode register set*⁸
Extended mode register set*⁸
H
×
×
×
×
DESL
NOP
L
H
H
H
×
NOP
NOP
L
H
H
L
×
BST
ILLEGAL
L
H
L
H
BA, CA, A10 READ/READA
Begin read*⁶
L
H
L
L
BA, CA, A10 WRIT/WRITA
Begin write*⁶
L
L
H
H
BA, RA
L
L
H
L
BA, A10
ACT
PRE, PALL
Other bank active
ILLEGAL on same bank*²
Precharge*⁷
L
L
L
H
×
REF, SELF
ILLEGAL
L
L
L
L
MODE
MRS
ILLEGAL
L
L
L
L
MODE
EMRS
ILLEGAL
Preliminary Data Sheet E0640E70 (Ver. 7.0)
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