EDD2508AMTA-5 Datasheet, PDF (15/34 Pages) Elpida Memory – 256M bits DDR SDRAM

EDD2508AMTA-5, EDD2516AMTA-5
Row address strobe and bank activate [ACT]
This command activates the bank that is selected by BA0, BA1 and determines the row address (AX0 to AX12).
(See Bank Select Signal Table)
Precharge selected bank [PRE]
This command starts precharge operation for the bank selected by BA0, BA1. (See Bank Select Signal Table)
[Bank Select Signal Table]
BA0
BA1
Bank 0
L
L
Bank 1
H
L
Bank 2
L
H
Bank 3
H
H
E_{Remark: H: VIH. L: VIL.}
Precharge all banks [PALL]
O^{This command starts a precharge operation for all banks.}
Refresh [REF/SELF]
This command starts a refresh operation. There are two types of refresh operation, one is auto-refresh, and another
L ^{is self-refresh. For details, refer to the CKE truth table section.}
Mode register set/Extended mode register set [MRS/EMRS]
The DDR SDRAM has the two mode registers, the mode register and the extended mode register, to defines how it
works. The both mode registers are set through the address pins (the A0 to the A12, BA0 to BA1) in the mode
register set cycle. For details, refer to "Mode register and extended mode register set".
P _{CKE Truth Table}
CKE
Current state
Command
n–1 n
/CS /RAS /CAS /WE
r _Idle
Auto-refresh command (REF)
H
H
L
L
L
H
Idle
Self-refresh entry (SELF)
H
L
L
L
L
H
o _Idle
Power down entry (PDEN)
H
L
L
H
H
H
H
L
H
×
×
×
Self refresh
Self refresh exit (SELFX)
L
H
L
H
H
H
d _L
H
H
×
×
×
Power down
Power down exit (PDEX)
L
H
L
H
H
H
L
H
H
×
×
×
u ^{Remark: H: VIH. L: VIL. ×: VIH or VIL.}
Notes: 1. All the banks must be in IDLE before executing this command.
ct ^{2. The CKE level must be kept for 1 CK cycle at least.}
Address
×
×
×
×
×
×
×
×
Notes
2
2
Preliminary Data Sheet E0406E10 (Ver. 1.0)
15