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HB52R1289E22 Datasheet, PDF (14/18 Pages) Elpida Memory – 1 GB Registered SDRAM DIMM 1 GB Registered SDRAM DIMM (36 pcs of 64 M × 4 Components) PC100 SDRAM
HB52R1289E22-A6B/B6B
Relationship Between Frequency and Minimum Latency
Parameter
Frequency (MHz)
tCK (ns)
Active command to column command (same bank)
Active command to active command (same bank)
Active command to precharge command (same bank)
Precharge command to active command (same bank)
Write recovery or data-in to precharge command
(same bank)
Active command to active command (different bank)
Self refresh exit time
Last data in to active command
(Auto precharge, same bank)
Self refresh exit to command input
Precharge command to high impedance
(CE latency = 3)
(CE latency = 4)
Last data out to active command (auto precharge)
(same bank)
Last data out to precharge (early precharge)
(CE latency = 3)
(CE latency = 4)
Column command to column command
Write command to data in latency
DQMB to data in
DQMB to data out
CKE to CK disable
Register set to active command
S to command disable
Power down exit to command input
Burst stop to output valid data hold
(CE latency = 3)
(CE latency = 4)
HB52R1289E22
-A6B/B6B
PC100
Symbol Symbol 10
Notes
I RCD
2
I RC
7
1
= [IRAS + IRP]
1
I RAS
5
1
I RP
2
1
I DPL
Tdpl 2
1
I RRD
2
I SREX
Tsrx
2
I APW
Tdal 4
1
2
= [IDPL + IRP]
I SEC
7
= [IRC]
3
I HZP
I HZP
I APR
I EP
I EP
I CCD
I WCD
I DID
I DOD
I CLE
I RSA
I CDD
I PEC
I BSR
I BSR
Troh 3
Troh 4
0
–2
–3
Tccd 1
Tdwd 1
Tdqm 1
Tdqz 3
Tcke 2
Tmrd 1
0
1
2
3
Data Sheet E0017H20
14