EBE21UE8ABFA Datasheet, PDF (13/27 Pages) Elpida Memory – 2GB Unbuffered DDR2 SDRAM DIMM

EBE21UE8ABFA
Parameter
Symbol Grade
max.
Unit Test condition
-8E
Auto-refresh current
(Another rank is in IDD2P)
IDD5
-6E
-5C
-4A
-8E
Auto-refresh current
(Another rank is in IDD3N)
IDD5
-6E
-5C
-4A
2880
2760
2640
2560
3520
3320
3080
2920
mA tCK = tCK (IDD);
Refresh command at every tRFC (IDD) interval;
CKE is H, /CS is H between valid commands;
Other control and address bus inputs are SWITCHING;
mA ^{Data bus inputs are SWITCHING}
Self-refresh current
IDD6
Self Refresh Mode;
CK and /CK at 0V;
192
mA CKE ≤ 0.2V;
Other control and address bus inputs are FLOATING;
Data bus inputs are FLOATING
Operating current
-8E
(Bank interleaving)
IDD7
(Another rank is in IDD2P)
-6E
-5C
-4A
Operating current
-8E
(Bank interleaving)
IDD7
-6E
-5C
(Another rank is in IDD3N)
-4A
2800
2600
2560
2480
3440
3160
3000
2840
all bank interleaving reads, IOUT = 0mA;
mA BL = 4, CL = CL(IDD), AL = tRCD (IDD) −1 × tCK (IDD);
tCK = tCK (IDD), tRC = tRC (IDD), tRRD = tRRD(IDD),
tFAW = tFAW (IDD), tRCD = 1 × tCK (IDD);
CKE is H, CS is H between valid commands;
mA Address bus inputs are STABLE during DESELECTs;
Data pattern is same as IDD4W;
Notes: 1. IDD specifications are tested after the device is properly initialized.
2. Input slew rate is specified by AC Input Test Condition.
3. IDD parameters are specified with ODT disabled.
4. Data bus consists of DQ, DM, DQS, /DQS, RDQS, /RDQS, LDQS, /LDQS, UDQS, and /UDQS. IDD
values must be met with all combinations of EMRS bits 10 and 11.
5. Definitions for IDD
L is defined as VIN ≤ VIL (AC) (max.)
H is defined as VIN ≥ VIH (AC) (min.)
STABLE is defined as inputs stable at an H or L level
FLOATING is defined as inputs at VREF = VDDQ/2
SWITCHING is defined as:
inputs changing between H and L every other clock cycle (once per two clocks) for address and control
signals, and inputs changing between H and L every other data transfer (once per clock) for DQ signals
not including masks or strobes.
6. Refer to AC Timing for IDD Test Conditions.
Preliminary Data Sheet E0906E10 (Ver. 1.0)
13