MC-458CB647 Datasheet, PDF (10/16 Pages) NEC – 8M-WORD BY 64-BIT SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE

MC-458CB647
Serial PD
(1/2)
Byte No.
Function Described
Hex Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Notes
0 Defines the number of bytes written into 80H 1
0
0
0
0
0
0
0 128 bytes
serial PD memory
1 Total number of bytes of serial PD memory 08H 0
0
0
0
1
0
0
0 256 bytes
2 Fundamental memory type
3 Number of rows
4 Number of columns
5 Number of banks
6 Data width
E7 Data width (continued)
8 Voltage interface
9 CL = 3 Cycle time
10 CL = 3 Access time
O_{11 DIMM configuration type}
12 Refresh rate/type
13 SDRAM width
L ^{14 Error checking SDRAM width}
04H 0
0
0
0
0
1
0
0 SDRAM
0CH 0
0
0
0
1
1
0
0 12 rows
09H 0
0
0
0
1
0
0
1 9 columns
01H 0
0
0
0
0
0
0
1 1 bank
40H 0
1
0
0
0
0
0
0 64 bits
00H 0
0
0
0
0
0
0
00
01H 0
0
0
0
0
0
0
1 LVTTL
75H 0
1
1
1
0
1
0
1 7.5 ns
54H 0
1
0
1
0
1
0
0 5.4 ns
00H 0
0
0
0
0
0
0
0 Non-parity
80H 1
0
0
0
0
0
0
0 Normal
10H 0
0
0
1
0
0
0
0 ×16
00H 0
0
0
0
0
0
0
0 None
15
16
17
18
19
20
21
22
23
24
25-26
27
28
29
30
31
Minimum clock delay
Burst length supported
Number of banks on each SDRAM
/CAS latency supported
/CS latency supported
P _{/WE latency supported}
SDRAM module attributes
SDRAM device attributes : General
r _{CL = 2 Cycle time}
CL = 2 Access time
o _tRP(MIN.)
tRRD(MIN.)
d ^tRCD(MIN.)
tRAS(MIN.)
uct ^{Module bank density}
01H 0
0
0
0
0
0
0
1 1 clock
8FH 1
0
0
0
1
1
1
1 1, 2, 4, 8, F
04H 0
0
0
0
0
1
0
0 4 banks
06H 0
0
0
0
0
1
1
0 2,3
01H 0
0
0
0
0
0
0
10
01H 0
0
0
0
0
0
0
10
00H 0
0
0
0
0
0
0
0
0EH 0
0
0
0
1
1
1
0
A0H 1
0
1
0
0
0
0
0 10 ns
60H 0
1
1
0
0
0
0
0 6 ns
00H 0
0
0
0
0
0
0
0
14H 0
0
0
1
0
1
0
0 20 ns
0FH 0
0
0
0
1
1
1
1 15 ns
14H 0
0
0
1
0
1
0
0 20 ns
2DH 0
0
1
0
1
1
0
1 45 ns
10H 0
0
0
1
0
0
0
0 64M bytes
10
Data Sheet E0062N20