HM5216165 Datasheet, PDF (1/52 Pages) Elpida Memory – 16M LVTTL INTERFACE SDRAM (512-kword x 16-bit x 2-bank)

HM5216165 Series
16 M LVTTL Interface SDRAM (512-kword × 16-bit × 2-bank)
100 MHz/83 MHz
E0167H10 (Ver. 1.0)
(Previous ADE-203-280C (Z))
Jun. 12, 2001
Description
All inputs and outputs are referred to the rising edge of the clock input. The HM5216165 is offered in 2
banks for improved performance.
Features
• 3.3 V Power supply
• Clock frequency: 100 MHz/83 MHz
• LVTTL interface
• Single pulsed RAS
• 2 Banks can operates simultaneously and independently
• Burst read/write operation and burst read/single write operation capability
• Programmable burst length: 1/2/4/8/full page
• 2 variations of burst sequence
 Sequential (BL = 1/2/4/8/full page)
 Interleave (BL = 1/2/4/8)
• Programmable CAS latency: 1/2/3
• Byte control by DQMU and DQML
• Refresh cycles: 4096 refresh cycles/64 ms
• 2 variations of refresh
 Auto refresh
 Self refresh
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.