EDS6432AFTA Datasheet, PDF (1/49 Pages) Elpida Memory – 64M bits SDRAM (2M words x 32 bits)

DATA SHEET
64M bits SDRAM
EDS6432AFTA, EDS6432CFTA
(2M words × 32 bits)
Description
Pin Configurations
The EDS6432AFTA, EDS6432CFTA are 64M bits
SDRAMs organized as 524,288 words × 32 bits × 4
banks. All inputs and outputs are synchronized with
the positive edge of the clock.
Supply voltages are 3.3V (EDS6432AFTA) and 2.5V
(EDS6432CFTA).
It is packaged in 86-pin plastic TSOP (II).
Features
• 3.3V and 2.5V power supply
• Clock frequency: 166MHz/133MHz (max.)
• Single pulsed /RAS
• ×32 organization
• 4 banks can operate simultaneously and
independently
• Burst read/write operation and burst read/single
write operation capability
• 2 variations of burst sequence
 Sequential (BL = 1, 2, 4, 8, full page)
 Interleave (BL = 1, 2, 4, 8)
• Programmable /CAS latency (CL): 2, 3
• Byte control by DQM
• Refresh cycles: 4096 refresh cycles/64ms
• 2 variations of refresh
 Auto refresh
 Self refresh
• TSOP (II) package with lead free solder (Sn-Bi)
 RoHS compliant
/xxx indicate active low signal.
86-pin Plastic TSOP(II)
VDD 1
DQ0 2
VDDQ 3
DQ1 4
DQ2 5
VSSQ 6
DQ3 7
DQ4 8
VDDQ 9
DQ5 10
DQ6 11
VSSQ 12
DQ7 13
NC 14
VDD 15
DQM0 16
/WE 17
/CAS 18
/RAS 19
/CS 20
NC 21
BA0 22
BA1 23
A10(AP) 24
A0 25
A1 26
A2 27
DQM2 28
VDD 29
NC 30
DQ16 31
VSSQ 32
DQ17 33
DQ18 34
VDDQ 35
DQ19 36
DQ20 37
VSSQ 38
DQ21 39
DQ22 40
VDDQ 41
DQ23 42
VDD 43
86 VSS
85 DQ15
84 VSSQ
83 DQ14
82 DQ13
81 VDDQ
80 DQ12
79 DQ11
78 VSSQ
77 DQ10
76 DQ9
75 VDDQ
74 DQ8
73 NC
72 VSS
71 DQM1
70 NC
69 NC
68 CLK
67 CKE
66 A9
65 A8
64 A7
63 A6
62 A5
61 A4
60 A3
59 DQM3
58 VSS
57 NC
56 DQ31
55 VDDQ
54 DQ30
53 DQ29
52 VSSQ
51 DQ28
50 DQ27
49 VDDQ
48 DQ26
47 DQ25
46 VSSQ
45 DQ24
44 VSS
(Top view)
A0 to A10 Address input
BA0, BA1 Bank select address
DQ0 to DQ31 Data-input/output
/CS
Chip select
/RAS
Row address strobe
/CAS
Column address strobe
/WE
Write enable
DQM0 to DQM3 Input output mask
CKE
Clock enable
CLK
Clock input
VDD
Power for internal circuit
VSS
Ground for internal circuit
VDDQ
Power for DQ circuit
VSSQ
Ground for DQ circuit
NC
No connection
Document No. E0487E50 (Ver. 5.0)
Date Published June 2005 (K) Japan
Printed in Japan
URL: http://www.elpida.com
Elpida Memory, Inc. 2004-2005