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EDS6416AHBH-TT Datasheet, PDF (1/49 Pages) Elpida Memory – 64M bits SDRAM WTR (Wide Temperature Range) | |||
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DATA SHEET
64M bits SDRAM
WTR (Wide Temperature Range)
EDS6416AHBH-TT (4M words à 16 bits) Specifications
⢠Density: 64M bits
E⢠Organization
⯠1M words à 16 bits à 4 banks
⢠Package: 60-ball FBGA
⯠Lead-free (RoHS compliant)
O⢠Power supply: VDD, VDDQ = 3.3V ± 0.3V
⢠Clock frequency: 133MHz (max.)
⢠Four internal banks for concurrent operation
⢠Interface: LVTTL
L ⢠Burst lengths (BL): 1, 2, 4, 8, full page
Pin Configurations
/xxx indicate active low signal.
60-ball FBGA
1
2
3
4
5
6
7
A
VSS DQ15
DQ0 VDD
B
DQ14 VSSQ
C
DQ13 VDDQ
D
DQ12 DQ11
VDDQ DQ1
VSSQ DQ2
DQ4 DQ3
⢠Burst type (BT):
⯠Sequential (1, 2, 4, 8, full page)
⯠Interleave (1, 2, 4, 8)
⢠/CAS Latency (CL): 2, 3
⢠Precharge: auto precharge operation for each burst
access
P ⢠Refresh: auto-refresh, self-refresh
⢠Refresh cycles: 4096 cycles/64ms
⯠Average refresh period: 15.6μs
⢠Operating ambient temperature range
r ⯠TA = â20°C to +85°C
Features
o ⢠Single pulsed /RAS
⢠Burst read/write operation and burst read/single write
operation capability
d ⢠Byte control by UDQM and LDQM
⢠Wide temperature range
uct ⯠TA = â20°C to +85°C
E
DQ10 VSSQ
F
DQ9 VDDQ
G
DQ8 NU
VDDQ DQ5
VSSQ DQ6
NU DQ7
H
NU VSS
J
NU UDQM
K
NU CLK
L
CKE NU
M
A11 A9
N
A8 A7
P
A6 A5
R
VSS A4
VDD NU
LDQM /WE
/RAS /CAS
NC /CS
BA1 BA0
A0 A10
A2 A1
A3 VDD
(Top view)
A0 to A11
BA0, BA1
DQ0 to DQ15
/CS
/RAS
/CAS
/WE
LDQM, UDQM
Address input
Bank select address
Data-input/output
Chip select
Row address strobe
Column address strobe
Write enable
Input/output mask
CKE
CLK
VDD
VSS
VDDQ
VSSQ
NC *1
NU *2
Clock enable
Clock input
Power for internal circuit
Ground for internal circuit
Power for DQ circuit
Ground for DQ circuit
No connection
Not usable
Notes:1. Not internally connected.
2. Don't connect. Internally connected.
Document No. E0718E20 (Ver. 2.0)
Date Published December 2005 (K) Japan
Printed in Japan
URL: http://www.elpida.com
This product became EOL in April, 2007.
©Elpida Memory, Inc. 2005
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