EBR51EC8ABKD Datasheet, PDF (1/13 Pages) Elpida Memory – 512MB 32-bit Direct Rambus DRAM RIMM™ Module

PRELIMINARY DATA SHEET
512MB 32-bit Direct Rambus DRAM RIMM Module
EBR51EC8ABKD (128M words × 18 bits × 2 channels) _Description
The 32-bit Direct Rambus RIMM module is a general-
purpose high-performance lines of memory modules
suitable for use in a broad range of applications
including computer memory, personal computers,
Eworkstations, and other applications where high
bandwidth and latency are required.
The EBR51EC8ABKD consists of 16 pieces of 288Mb
O_{Direct Rambus DRAM (Direct RDRAM) devices.}
These are extremely high-speed CMOS DRAMs
organized as 16M words by 18 bits. The use of
Rambus Signaling Level (RSL) technology permits the
L ^{use of conventional system and board design}
Features
• 512MB Direct RDRAM storage and 512 banks total
on module
• 2 independent Direct RDRAM channels, 1 pass
through and 1 terminated on 32-bit RIMM module
• High speed 1066MHz / 800MHz Direct RDRAM
devices
• 232 edge connector pads with 1mm pad spacing
 Module PCB size: 133.35mm × 34.925mm ×
1.27mm
 Gold plated edge connector pads contacts
• Serial Presence Detect (SPD) support
• Operates from a 2.5V supply
technologies. The 32-bit RIMM modules support
1066MHz or 800MHz transfer rate per pin, resulting in
total module bandwidth of 3.2GB/s.
The 32-bit RIMM module provides two independent 18
bit memory channels to facilitate compact system
P ^{design. The "Thru" Channel enters and exits the}
module to support a connection to or from a controller,
memory slot, or termination. The "Term" Channel is
terminated on the module and supports a connection
from a controller or another memory slot.
r _{The RDRAM architecture enables the highest}
o ^{sustained bandwidth for multiple, simultaneous,}
randomly addressed memory transactions. The
separate control and data buses with independent row
and column control yield over 95% bus efficiency. The
RDRAM device multi-bank architecture supports up to
duct _{four simultaneous transactions per device.}
• Low power and power down self refresh modes
• Separate Row and Column buses for higher
efficiency
• RDRAMs uses Chip Scale Package (CSP)
 FBGA package
Document No. E0311E11 (Ver. 1.1) _{This product became EOL in May, 2004.}
Date Published March 2006 (K) Japan
URL: http://www.elpida.com
Elpida Memory, Inc. 2002-2006