APX811_09 Datasheet, PDF (7/10 Pages) Diodes Incorporated – 4-Pin Microprocessor Supervisor With Manual Reset

APX811/812
4-Pin Microprocessor Supervisor With Manual Reset
Application Information
A microprocessor’s (µP’s) reset input starts the µP in a known state. The APX811/812 asserts reset to prevent code-execution errors
during power-up, power-down, or brownout conditions. They assert a reset signal whenever the VCC supply voltage declines below a
preset threshold or the MR pin is brought low, keeping it asserted for at least 240ms after VCC has risen above the reset threshold. The
APX811/812 have a push-pull output stage.
The APX811/812 reset output is guaranteed to be logic low for the APX811 and high the APX812 for VCC > 1V. Once VCC exceeds the
reset threshold, an internal timer keeps RESET output low (and RESET high for the APX812) for the reset timeout period. After this
interval, the APX811’s RESET output goes high (APX812’s RESET output goes low). If a brownout condition occurs (VCC dips below the
reset threshold), the APX811’s RESET output goes low (APX812’s RESET output goes high). Any time VCC goes below the reset
threshold, the internal timer resets to zero, and RESET goes low (RESET goes high). The internal timer starts after VCC returns above
the reset threshold, and RESET remains low (RESET remains high) for the reset timeout period.
Ensuring a Valid Reset Output Down to VCC = 0
When VCC falls below 1V, the APX811 RESET no longer sinks current-— it becomes an open circuit. Therefore, high-impedance
CMOS logic inputs connected to RESET can drift to undetermined voltages. This presents no problem in most applications since most
µP and other circuitry is inoperative with VCC below 1V. However, in applications where RESET must be valid down to 0V, adding a pull
down resistor to RESET causes any stray leakage currents to flow to ground, holding RESET low. R1’s value is not critical; 100k is
large enough not to load RESET and small enough to pull RESET to ground.
For the APX812 if RESET is required to remain valid for VCC < 1V then a 100kΩ pull-up resistor between RESET and VCC is
recommended.
Benefits of Highly Accurate Reset Threshold
Most µP supervisor ICs has reset threshold voltages between 5% and 10% below the value of nominal supply voltages. This ensures a
reset will not occur within 5% of the nominal supply, but will occur when the supply is 10% below nominal. When using ICs rated at only
the nominal supply ±5%, this leaves a zone of uncertainty where the supply is between 5% and 10% low, and where the reset may or may
not be asserted.
APX811/812 Rev. 2
DS31960
7 of 10
www.diodes.com
OCTOBER 2009
© Diodes Incorporated