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| 74HC595 Datasheet, PDF (7/11 Pages) NXP Semiconductors – 8-bit serial-in/serial or parallel-out shift register with output latches; 3-state | |||
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Parameter Measurement Information
From Output
Under Test
CL
(see Note A)
RL
VLOAD
VCC
2.0V
4.5V
6.0V
Inputs
VI
tr/tf
VCC
6ns
VCC
6ns
VCC
6ns
74HC595
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Vload
Open
Vcc
GND
VM
VCC/2
VCC/2
VCC/2
CL
50pF
50pF
50pF
Voltage Waveform
Pulse Duration and Recovery Time
Voltage Waveform
Set-up and Hold Times
Voltage Waveform
Propagation Delay Times
Inverting and Non Inverting Outputs
Voltage Waveform
Enable and Disable Times
Notes:
A. Includes test lead and test apparatus capacitance.
B. Output Waveform 1 depends on the internal QN node being low and behaves in this manner based on OE pin.
Output Waveform 2 depends on the internal QN node being high and behaves in this manner based on OE pin.
C. All pulses are supplied at pulse repetition rate ⤠10MHz
D. Inputs are measured separately one transition per measurement
E. tPLH and tPHL are the same as tPD
Figure 1. Load Circuit and Voltage Waveforms
74HC595
Document number: DS35492 Rev. 3 - 2
7 of 11
www.diodes.com
June 2013
© Diodes Incorporated
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