74AUP2G06 Datasheet, PDF (7/12 Pages) NXP Semiconductors – Low-power dual inverter with open-drain output

Parameter Measurement Information
74AUP2G06
TEST
t_PLZ (see Notes D and E)
t_PZL(see Notes D and F)
Condition
Vload
Vload
V_CC
0.8V
1.2V±0.1V
1.5V±0.1V
1.8V±0.15V
2.5V±0.2V
3.3V±0.3V
Inputs
V_I
t_r/t_f
V_CC
≤3 ns
V_CC
≤3 ns
V_CC
≤3 ns
V_CC
≤3 ns
V_CC
≤3 ns
V_CC
≤3 ns
V_M
V_CC/2
V_CC/2
V_CC/2
V_CC/2
V_CC/2
V_CC/2
V_LOAD
C_L
R_L
2 X V_CC
5, 10, 15, 30pF
5kΩ
2 X V_CC
5, 10, 15, 30pF
5kΩ
2 X V_CC
5, 10, 15, 30pF
5kΩ
2 X V_CC
5, 10, 15, 30pF
5kΩ
2 X V_CC
5, 10, 15, 30pF
5kΩ
2 X V_CC
5, 10, 15, 30pF
5kΩ
V∆
0.1V
0.1V
0.15V
0.15V
0.15V
0.3V
Voltage Waveform Pulse Duration
Voltage Waveform Propagation Delay Times
Figure 1 Load Circuit and Voltage Waveforms
Notes:
A. Includes test lead and test apparatus capacitance.
B. All pulses are supplied at pulse repetition rate ≤ 10MHz
C. The inputs are measured one at a time with one transition per measurement.
D. For the open drain device t_PLZ and t_PZL are the same as t_PD.
E. t_PZL is measured at V_M.
D. t_PLZ is measured at V_OL +V_∆.
74AUP2G06
Document number: DS35510 Rev. 4 - 2
7 of 12
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May 2014
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