AP7173_09 Datasheet, PDF (6/16 Pages) Diodes Incorporated – 1.5A LOW DROPOUT LINEAR REGULATOR WITH

Electrical Characteristics
AP7173
1.5A LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
At VEN = 1.1V, VIN = VOUT + 0.5V, CVCC = 0.1uF, CIN = COUT = 10uF, IOUT = 50mA, VVCC = 5.0V, and TA = –40°C to +85°C, unless otherwise
noted. Typical values are at TA = +25°C.
Symbol
Parameter
Test Conditions
Min
Typ. Max Unit
VIN
VVCC
Input Voltage Range
Bias Pin Voltage Range
(Note 7)
VREF
Internal Reference
(Adj.)
TA = +25 ºC
VOUT
Output Voltage Range
Accuracy (Note 8)
∆VOUT /∆VIN / VOUT
∆VOUT /VOUT /∆IOUT
VDO
Line Regulation
Load Regulation
Dropout Voltage
(Note 9)
ICL
Current Limit
VIN= 5V, IOUT= 1.5A
2.97V≤VVCC≤5.5V,
50mA≤IOUT≤1.5A
VOUT (NOM) + 0.5≤VIN, 5.5V
50mA≤IOUT≤1.5A
IOUT = 1.5A,VVCC–VOUT(NOM)≥3.25V
IOUT= 1.5A, VIN = VVCC
VOUT = 80% x VOUT (NOM)
ISHORT
IVCC
ISHDN
IFB
PSRR
TST
ISS
Short-Circuit Current VOUT < 0.2V
Bias Pin Current
Shutdown Supply
Current (IGND)
VEN≤0.4V
Feedback Pin Current
1KHz, IOUT= 1A,
Power-Supply Rejection VIN= 1.8V, VOUT= 1.5V
(VIN to VOUT)
300KHz, IOUT =1A,
VIN= 1.8V, VOUT =1.5V
1KHz, IOUT = 1A,
Power-SupplyRejection VIN= 1.8V, VOUT =1.5V
(VVCC to VOUT)
300KHz, IOUT = 1A,
VIN= 1.8V, VOUT =1.5V
Startup Time
RLOAD for IOUT = 1.0A, CSS = open
Soft-Start Charging
Current
VSS= 0.4V
VEN, HI
VEN, LO
VEN, HYS
IEN
VPG, TH
VPG, HYS
VPG, LO
IPG, LKG
TSD
Enable Input High Level
Enable Input Low Level
Enable Pin Hysteresis
Enable Pin Current
VEN= 5V
PG Trip Threshold
VOUT decreasing
PG Trip Hysteresis
PG Output Low Voltage IPG= 1mA (sinking), VOUT<VPG, TH
PG Leakage Current
Thermal Shutdown
VPG= 5.25V, VOUT>VPG, TH
Shutdown, temperature increasing
Temperature
Reset, temperature decreasing
θJA
Thermal Resistance
Junction-to-Ambient
DFN3030-10 (Note 10)
SOP-8L-EP (Note 11)
VOUT + VDO
2.7
0.792
0.8
0.8
–2
±0.5
0.03
0.09
165
1.5
2
3
0.6
1
1
1
–1
0.1
60
30
50
30
100
440
1.1
0
50
0.1
85
90
3
0.1
+150
+130
38
30
5.5
V
5.5
V
0.808 V
3.3
V
2
%
%/V
%/A
270 mV
1.7
V
4
A
A
2
mA
50
µA
1
µA
dB
dB
µS
nA
5.5
V
0.4
V
mV
1
µA
94 %VOUT
%VOUT
0.3
V
1
µA
ºC
o_C/W
Notes:
7. VVCC should be higher or equal to VIN in this chip.
8. Tested at 0.8V; resistor tolerance is not taken into account.
9. Dropout is defined as the voltage from VIN to VOUT when VOUT is 3% below nominal.
10. Test condition for DFN3030-10: Device mounted on FR-4 substrate (2s2p), 2"*2" PCB, with 2oz copper trace thickness and large pad pattern.
11. Test condition for SOP-8L-EP: Device mounted on FR-4 substrate (2s2p), 2"*2" PCB, with 2oz copper trace thickness and large pad pattern.
AP7173 Rev. 7
DS31369
6 of 16
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OCTOBER 2009
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