APX803-29SAG-7 Datasheet, PDF (5/10 Pages) Diodes Incorporated – 3-PIN MICROPROCESSOR RESET CIRCUIT

APX803
3-PIN MICROPROCESSOR RESET CIRCUIT
Functional Description
Microprocessors (µPs) and microcontrollers (µC) have a reset
input to ensure that it starts up in a known state. The APX803
drive the µP’s reset input to prevent code-execution errors during
power-up, power-down, or brownout conditions. They assert a
reset signal whenever the VCC supply voltage declines below a
preset threshold, keeping it asserted for at least 140ms after VCC
has risen above the reset threshold. The APX803 has an
open-drain output stage.
Ensuring a Valid Reset Output
Down to VCC = 0
RESET is guaranteed to be a logic low for VCC > 1V. Once VCC
exceeds the reset threshold, an internal timer keeps RESET
low for the reset timeout period; after this interval, RESET
goes high. If a brownout condition occurs (VCC dips below the
RESET reset threshold), RESET goes low. Any time
VCC goes below the reset threshold, the internal timer resets to
zero, and RESET goes low. The internal timer starts after
VCC returns above the reset threshold, and RESET remains
low for the reset timeout period.
When VCC falls below 1V, the APX803 RESET output no
longer sinks current — it becomes an open circuit. Therefore,
high-impedance CMOS logic inputs connected to RESET can
drift to undetermined voltages.
This presents no problem in most applications since most µP and
other circuitry is inoperative with VCC below 1V.
Interfacing to µP with Bidirectional Reset Pins
Since the RESET output on the APX803 is open drain, this
device interfaces easily with μP/µC that have bidirectional reset
pins, such as the Motorola 68HC11.
Connecting the μP supervisor’s RESET output directly to the
microcontroller’s (μC’s) RESET pin with a single pull-up resistor
allows either device to assert reset.
Supervising and monitoring Multiple Supplies
Generally, the pull-up resistor connected to the APX803 will
connect to the supply voltage that is being monitored at the IC’s
VCC pin. However, some systems may use the APX803
open-drain output to level-shift from the monitored supply to reset
the µP powered by a different supply voltage or monitor multiple
supplies that will be fed into 1 µC/µP reset input.
Block Diagram
VREF
Delay Circuit
Driver
RESET
/ RESET
APX803 Rev. 1
Document number: DS32132 Rev. 1 – 2
5 of 10
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MARCH 2010
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