DMP4013LFGQ Datasheet, PDF (4/7 Pages) Diodes Incorporated – 40V P-CHANNEL ENHANCEMENT MODE MOSFET

DMP4013LFGQ
0.022
0.02
0.018
0.016
V_GS = -4.5V
I_D = -8A
0.014
0.012
V_GS = -10V
I_D = -10A
0.01
0.008
0.006
0.004
-50 -25 0 25 50 75 100 125 150
T_J, JUNCTION TEMPERATURE (C)
Figure 7 On-Resistance Variation with Temperature
30
25
20
1.8
1.6
1.4
-I_D = 1mA
1.2
-I_D = 250µA
1
0.8
0.6
0.4
-50 -25 0 25 50 75 100 125 150
T_A, AMBIENT TEMPERATURE (°C)
Figure 8 Gate Threshold Variation vs. Ambient Temperature
10000
f = 1MHz
C_iss
15
T_A= 150C
10
T_A= 125C
5
T_A= 85C
T_A= 25C
T_A= -55C
00
0.3
0.6
0.9
1.2
1.5
V_SD, SOURCE-DRAIN VOLTAGE (V)
Figure 9 Diode Forward Voltage vs. Current
10
8
6
V_DS = -20V
I_D = -10A
4
2
00
10 20 30 40 50 60 70
Q_g, TOTAL GATE CHARGE (nC)
Figure 11 Gate-Charge Characteristics
1000
C_rss
C_oss
100
0
5 10 15 20 25 30 35 40
V_DS, DRAIN-SOURCE VOLTAGE (V)
Figure 10 Typical Junction Capacitance
100
R_DS(on)
Limited
10
DC
P_W = 10s
1
P_W = 1s
P_W = 100ms
P_W = 10ms
0.1 _{TJ(max) = 150°C}
P_W = 1ms
T_A = 25°C
V_GS = -10V
P_W = 100µs
Single Pulse
DUT on 1 * MRP Board
0.01
0.1
1
10
100
V_DS, DRAIN-SOURCE VOLTAGE (V)
Figure 12 SOA, Safe Operation Area
DMP4013LFGQ
Document number: DS38779 Rev. 1 - 2
4 of 7
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April 2016
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