DMP3050LSS_15 Datasheet, PDF (4/6 Pages) Diodes Incorporated – P-CHANNEL ENHANCEMENT MODE MOSFET

DMP3050LSS
0.10
0.08
0.06
0.04
0.02
V_GS = -4.5V
I_D = -5A
V_GS = -10V
I_D = -10A
0
-50 -25 0 25 50 75 100 125 150
T_J, JUNCTION TEMPERATURE (°C)
Fig. 7 On-Resistance Variation with Temperature
20
16
12
8
4
0
0.4
0.6
0.8
1.0
1.2 1.4
-V_SD, SOURCE-DRAIN VOLTAGE (V)
Fig. 9 Diode Forward Voltage vs. Current
10
8
6
4
2
0
0
2
4
6
8
10 12
Q_g, TOTAL GATE CHARGE (nC)
Fig. 11 Gate-Charge Characteristics
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
-50 -25 0 25 50 75 100 125 150
T_A, AMBIENT TEMPERATURE (°C)
Fig. 8 Gate Threshold Variation vs. Ambient Temperature
10,000
f = 1MHz
1,000
C_iss
100
C_oss
C_rss
10
0
100
10
5
10
15
20
25 30
-V_DS, DRAIN-SOURCE VOLTAGE (V)
Fig. 10 Typical Junction Capacitance
R_DS(on)
Limited
P_W = 10µs
1
DC
P_W = 10s
P_W = 1s
P_W = 100ms
P_W = 10ms
0.1 _{TJ(max) = 150°C}
T_A = 25°C
P_W = 1ms
P_W = 100µs
V_GS = -10V
Single Pulse
0.01 ^{DUT on 1 * MRP Board}
0.1
1
10
100
-V_DS, DRAIN-SOURCE VOLTAGE (V)
Fig. 12 SOA, Safe Operation Area
DMP3050LSS
Document number: DS35647 Rev. 4 - 2
4 of 6
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September 2012
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