74AUP1G00 Datasheet, PDF (2/11 Pages) NXP Semiconductors – Low-power 2-input NAND gate

Pin Descriptions
Pin Name
A
B
GND
Y
V_CC
Data Input
Data Input
Ground
Data Output
Supply Voltage
Function
Logic Diagram
1
A
2
B
4
Y
Function Table
Inputs
A
B
L
L
L
H
H
L
H
H
Output
Y
H
H
H
L
74AUP1G00
74AUP1G00
Document number: DS35145 Rev. 1- 2
2 of 11
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August 2012
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