AP6015_09 Datasheet, PDF (16/18 Pages) Diodes Incorporated – High Efficiency Step-Down Low Power DC-DC Converter

AP6015
High Efficiency Step-Down Low Power DC-DC Converter
Application Information (Continued)
„ Layout Considerations
A good board layout practice can significantly improve the stability of the application circuit and reduce the
system noise. The feedback path must be as short as possible. The input capacitor and bypass capacitor
must be placed close to the PVCC and the VCC pins for optimal performance. It is recommended that the
ground planes for System Ground / Power Ground / Analog Ground are isolated from each others, while they
should all be joined together at a common point. An example drawing of a circuit with good ground noise
performance is shown below.
V_I
C1
10µF
1 _PVCC
100 Ohm
2 _VCC
LX ^{9 L1}
FB ⁵
AP6015
C3
8 _EN
PG ⁴
1µF
10 _PGND
GND CC
3
6
Rcc
C _CC
100 pF
R3
680K
R1
Power Good
R2
V_O
C2
10 uF
The external inductor must be placed as close as possible to the switching node, i.e. the LX pin. The copper
traces on the pcb, where high peak switching current may flow through, should be kept ‘wide’ and ‘short’.
This results in low inductance and capacitance in the current path, hence ground shift problem is avoided and
system stability stay within bound.
AP6015 Rev. 3
16 of 18
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FEBRUARY 2009
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