AP22850 Datasheet, PDF (11/14 Pages) Diodes Incorporated – 10V SINGLE CHANNEL PROGRAMMABLE LOAD SWITCH

Board Layout and Thermal Considerations
AP22850
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Due to the high current capacity of the load switch, PCB layout needs to ensure good thermal distribution during operation. The top and bottom of
AP22850EV1, (the evaluation board for AP22850), can be seen below.
Figure 3 PCB Copper Layout & Silk Screen – Top
Figure 4 PCB Copper Layout & Silk Screen – Bottom
Thermal vias are used directly underneath the chip to help distribute the heat from the device. The ground plane on the underside of the board
effectively acts as a large heatsink. The widths of the tracks carrying VIN and VOUT are kept wide. Vias are also distributed around the board to
aid thermal conduction and to ensure a consistent potential, particularly around the ground connections of the capacitors. All capacitors used are
located as close as possible to the AP22850 to minimize any parasitic effects.
The maximum junction temperature of the AP22850 is +125°C. To ensure that this is not exceeded, the following equation can be used to give an
approximation of junction temperature. Temperature readings taken with a thermal camera can also give a good approximation of power
dissipation with the use of this equation. The board layout has a major influence on the parameter .
Where,
= Junction Temperature (°C)
= Ambient Temperature (°C)
= Junction to Ambient Thermal Impedance (°C/W)
= Power Dissipation (voltage drop across device output current) (W)
AP22850
Document number: DS36540 Rev. 2 - 2
11 of 14
www.diodes.com
March 2015
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