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ZVP4424C Datasheet, PDF (1/1 Pages) Diodes Incorporated – P-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET
P-CHANNEL ENHANCEMENT
MODE VERTICAL DMOS FET
ISSUE 2 – SEPTEMBER 94
FEATURES
* 240 Volt VDS
* RDS(on)=9Ω
* Low threshold
APPLICATIONS
* Electronic Hook Switch
ZVP4424C
G
D
S
REFER TO ZVP4424A FOR GRAPHS
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
Drain-Source Voltage
Continuous Drain Current at Tamb=25°C
Pulsed Drain Current
Gate Source Voltage
Power Dissipation at Tamb=25°C
Operating and Storage Temperature Range
SYMBOL
VDS
ID
IDM
VGS
Ptot
Tj:Tstg
E-Line
TO92 Compatible
VALUE
-240
-200
-1
± 40
750
-55 to +150
UNIT
V
mA
A
V
mW
°C
ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN. TYP MAX. UNIT CONDITIONS.
Drain-Source Breakdown BVDSS -240
Voltage
V
ID=-1mA, VGS=0V
Gate-Source Threshold
Voltage
VGS(th) -0.7 -1.4 -2.0 V
ID=-1mA, VDS= VGS
Gate-Body Leakage
IGSS
Zero Gate Voltage Drain IDSS
Current
100 nA
-10 µA
-100 µA
VGS=± 40V, VDS=0V
VDS=-240 V, VGS=0
VDS=-190V, VGS=0V, T=125°C
On-State Drain Current
Static Drain-Source
On-State Resistance
Forward
Transconductance (1) (2)
ID(on)
RDS(on)
gfs
-0.75 -1.0
7.1 9
8.8 11
125
A
VDS=-10 V, VGS=-10V
Ω
VGS=-10V,ID=-200mA
Ω
VGS=-3.5V,ID=-100mA
mS VDS=-10V,ID=-0.2A
Input Capacitance (2)
Ciss
Common Source Output Coss
Capacitance (2)
100 200 pF
18 25 pF
VDS=-25V, VGS=0V, f=1MHz
Reverse Transfer
Crss
Capacitance (2)
5
15 pF
Turn-On Delay Time (2)(3) td(on)
8
15 ns
Rise Time (2)(3)
tr
Turn-Off Delay Time (2)(3) td(off)
8
26
15
40
ns
ns
VDD ≈−50V, ID =-0.25A,
VGEN=-10V
Fall Time (2)(3)
tf
20 30 ns
(1) Measured under pulsed conditions. Width=300µs. Duty cycle ≤2% (2) Sample test.
(3) Switching times measured with 50Ω source impedance and <5ns rise time on a pulse generator
3-439