ZVP1320F Datasheet, PDF (1/3 Pages) Zetex Semiconductors – P-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET

SOT23 P-CHANNEL ENHANCEMENT
MODE VERTICAL DMOS FET
ISSUE 3 – JANUARY 1996 7
FEATURES
* V_DS - 200V
PARTMARKING DETAIL - MT
ZVP1320F
S
D
G
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
SYMBOL
VALUE
UNIT
Drain-Source Voltage
V_DS
-200
V
Continuous Drain Current at T_amb=25°C
I_D
-35
mA
Pulsed Drain Current
I_DM
-400
mA
Gate Source Voltage
V_GS
± 20
V
Power Dissipation at T_amb=25°C
P_tot
330
mW
Operating and Storage Temperature Range T_j:T_stg
-55 to +150
°C
ELECTRICAL CHARACTERISTICS (at T_amb = 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN. MAX. UNIT CONDITIONS.
Drain-Source Breakdown
Voltage
BV_DSS -200
V
I_D=-1mA, V_GS=0V
Gate-Source Threshold
Voltage
V_GS(th) -1.5 -3.5 V
I_D=-1mA, V_DS= V_GS
Gate-Body Leakage
I_GSS
Zero Gate Voltage Drain
I_DSS
Current
20 nA V_GS=± 20V, V_DS=0V
-10 µA V_DS=-200V, V_GS=0V
-50 µA V_DS=-160V, V_GS=0V,
T=125°C(2)
On-State Drain Current(1)
I_D(on)
Static Drain-Source On-State R_DS(on)
Resistance (1)
-100
80
mA V_DS=-25V, V_GS=-10V
Ω
V_GS=-10V, I_D=-50mA
Forward Transconductance g_fs
25
(1)(2)
mS V_DS=-25V, I_D=-50mA
Input Capacitance (2)
C_iss
Common Source Output
C_oss
Capacitance (2)
50 pF
15 pF V_DS=-25V, V_GS=0V, f=1MHz
Reverse Transfer
C_rss
5
pF
Capacitance (2)
Turn-On Delay Time (2)(3)
Rise Time (2)(3)
Turn-Off Delay Time (2)(3)
Fall Time (2)(3)
t_d(on)
t_r
t_d(off)
t_f
8
ns
8
ns
V_DD≈-25V, I_D=-50mA
8
ns
16 ns
(1) Measured under pulsed conditions. Width=300µs. Duty cycle ≤2% (2) Sample test.
(3) Switching times measured with 50Ω source impedance and <5ns rise time on a pulse generator
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