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ZVNL535A Datasheet, PDF (1/1 Pages) Zetex Semiconductors – N-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET
N-CHANNEL ENHANCEMENT
MODE VERTICAL DMOS FET
ISSUE 2 – MARCH 94
FEATURES
* 350 Volt VDS
* RDS(on)=40Ω
ZVNL535A
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
Drain-Source Voltage
Continuous Drain Current at Tamb=25°C
Pulsed Drain Current
Gate Source Voltage
Power Dissipation at Tamb=25°C
Operating and Storage Temperature Range
SYMBOL
VDS
ID
IDM
VGS
Ptot
Tj:Tstg
D
G
S
E-Line
TO92 Compatible
VALUE
350
90
800
± 20
700
-55 to +150
UNIT
V
mA
mA
V
mW
°C
ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN. MAX. UNIT CONDITIONS.
Drain-Source
Breakdown Voltage
BVDSS 350
V
ID=1mA, VGS=0V
Gate-Source
Threshold Voltage
VGS(th) 0.5 1.5 V
ID=1mA, VDS= VGS
Gate-Body Leakage
Zero Gate Voltage
Drain Current
IGSS
IDSS
100 nA VGS=± 20V, VDS=0V
50
µA VDS=350 V, VGS=0
400 µA VDS=280 V, VGS=0V,
T=125°C(2)
On-State Drain Current(1)
ID(on)
200
Static Drain-Source On-State RDS(on)
40
Resistance (1)
40
Forward Transconductance
gfs
100
(1)(2)
mA VDS=25 V, VGS=5V
Ω
VGS=5V,ID=100mA
Ω
VGS=3V,ID=50mA
mS VDS=25V,ID=100mA
Input Capacitance (2)
Common Source Output
Capacitance (2)
Ciss
Coss
70 pF
10
pF VDS=25 V, VGS=0V, f=1MHz
Reverse Transfer Capacitance Crss
(2)
4
pF
Turn-On Delay Time (2)(3)
td(on)
7
ns
Rise Time (2)(3)
Turn-Off Delay Time (2)(3)
tr
td(off)
7
ns
VDD ≈25V, ID=100mA
16 ns
Fall Time (2)(3)
tf
10 ns
(
3-405
1
)
Measured under pulsed conditions. Width=300µs. Duty cycle ≤2%