ZVN3320FTA Datasheet, PDF (1/1 Pages) Diodes Incorporated – SOT23 N-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET

SOT23 N-CHANNEL ENHANCEMENT
MODE VERTICAL DMOS FET
ISSUE 3 – DECEMBER 1995 7
FEATURES
* 200 Volt V_DS
* R_DS(on)= 25Ω
ZVN3320F
S
D
G
PARTMARKING DETAIL – MU
ABSOLUTE MAXIMUM RATINGS.
SOT23
PARAMETER
SYMBOL
VALUE
UNIT
Drain-Source Voltage
V_DS
200
V
Continuous Drain Current at T_amb=25°C
I_D
60
mA
Pulsed Drain Current
I_DM
1
A
Gate-Source Voltage
V_GS
± 20
V
Power Dissipation at T_amb=25°C
P_tot
330
mW
Operating and Storage Temperature Range T_j:T_stg
-55 to +150
°C
ELECTRICAL CHARACTERISTICS (at T_amb = 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN. MAX. UNIT CONDITIONS.
Drain-Source
Breakdown Voltage
BV_DSS
200
V
I_D=1mA, V_GS=0V
Gate-Source Threshold
Voltage
V_GS(th)
1.0
3.0
V
I_D=1mA, V_DS= V_GS
Gate-Body Leakage
I_GSS
Zero Gate Voltage
I_DSS
Drain Current
100 nA V_GS=± 20V, V_DS=0V
10
µA V_DS=200V, V_GS=0V
50
µA V_DS=160V, V_GS=0V,
T=125°C(2)
On-State Drain Current(1)
I_D(on)
250
Static Drain-Source On-State R_DS(on)
25
Resistance (1)
mA V_DS=25V, V_GS=10V
Ω
V_GS=10V,I_D=100mA
Forward Transconductance(1) g_fs
75
(2)
mS V_DS=25V,I_D=100mA
Input Capacitance (2)
C_iss
Common Source
C_oss
Output Capacitance (2)
45
pF
18
pF V_DS=25V, V_GS=0V, f=1MHz
Reverse Transfer Capacitance C_rss
(2)
5
pF
Turn-On Delay Time (2)(3)
Rise Time (2)(3)
Turn-Off Delay Time (2)(3)
t_d(on)
t_r
t_d(off)
5
ns
7
ns
V_DD ≈25V, I_D=100mA
6
ns
Fall Time (2)(3)
t_f
6
ns
(1) Measured under pulsed conditions. Width=300µs. Duty cycle ≤2% (2) Sample test.
(3) Switching times measured with 50Ω source impedance and <5ns rise time on a pulse generator
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