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ZVN2120GTA Datasheet, PDF (1/3 Pages) Diodes Incorporated – SOT223 N-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET
SOT223 N-CHANNEL ENHANCEMENT
MODE VERTICAL DMOS FET
ISSUE 2 - FEBRUARY 1996 7
FEATURES:
* VDS - 200V
* RDS(ON) - 10Ω
PARTMARKING DETAIL - ZVN2120
ZVN2120G
D
S
D
G
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
SYMBOL
VALUE
UNIT
Drain-Source Voltage
VDS
200
V
Continuous Drain Current at Tamb=25°C
ID
320
mA
Pulsed Drain Current
IDM
2
A
Gate-Source Voltage
VGS
± 20
V
Power Dissipation at Tamb=25°C
Ptot
2
W
Operating and Storage Temperature Range Tj:Tstg
-55 to +150
°C
ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN. MAX. UNIT CONDITIONS.
Drain-Source Breakdown
Voltage
BVDSS 200
V
ID=1mA, VGS=0V
Gate-Source Threshold Voltage VGS(th) 1
Gate-Body Leakage
IGSS
Zero Gate Voltage Drain
IDSS
Current
3
V
ID=1mA, VDS= VGS
20
nA VGS=± 20V, VDS=0V
10
µA VDS=200V, VGS=0V
100 µA VDS=160V, VGS=0V,
T=125°C(2)
On-State Drain Current(1)
ID(on)
500
Static Drain-Source On-State RDS(on)
10
Resistance (1)
mA VDS=25V, VGS=10V
Ω
VGS=10V, ID=250mA
Forward Transconductance(1)(2) gfs
Input Capacitance (2)
Ciss
Common Source Output
Capacitance (2)
Coss
100
85
20
mS VDS=25V, ID=250mA
pF
pF VDS=25V, VGS=0V, f=1MHz
Reverse Transfer Capacitance (2) Crss
Turn-On Delay Time (2)(3)
td(on)
Rise Time (2)(3)
tr
Turn-Off Delay Time (2)(3)
td(off)
Fall Time (2)(3)
tf
7
pF
8
ns
8
ns
VDD≈25V, ID=250mA
20
ns
12
ns
(1) Measured under pulsed conditions. Width=300µs. Duty cycle ≤2% (2) Sample test.
(3) Switching times measured with 50Ω source impedance and <5ns rise time on a pulse generator
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