DPLS325E Datasheet, PDF (1/4 Pages) Diodes Incorporated – LOW VCE(SAT) PNP SURFACE MOUNT TRANSISTOR

Features
• Epitaxial Planar Die Construction
• Low Collector-Emitter Saturation Resistance R_CE(SAT) = 70mΩ at 3A
• High DC Current Gain h_FE > 200 at I_C = 2A
• Complementary NPN Type Available (DNLS320E)
• Ideally Suited for Automated Assembly Processes
• Ideal for Medium Power Switching or Amplification Applications
• Lead Free By Design/RoHS Compliant (Note 1)
• “Green” Device (Note 2)
Mechanical Data
• Case: SOT-223
• Case Material: Molded Plastic, “Green” Molding Compound.
UL Flammability Classification Rating 94V-0
• Moisture Sensitivity: Level 1 per J-STD-020D
• Terminals: Finish – Matte Tin annealed over Copper Leadframe
(Lead Free Plating). Solderable per MIL-STD-202, Method 208
• Marking Information: See Page 3
• Ordering Information: See Page 3
• Weight: 0.112 grams (approximate)
DPLS325E
LOW V_CE(SAT) PNP SURFACE MOUNT TRANSISTOR
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SOT-223
3E
COLLECTOR
2,4
C4
2C
BASE 1
1B
TOP VIEW
3
EMITTER
Schematic and Pin Configuration
Maximum Ratings @T_A = 25°C unless otherwise specified
Characteristic
Collector-Base Voltage
Collector-Emitter Voltage
Emitter-Base Voltage
Continuous Collector Current
Peak Pulse Current
Symbol
V_CBO
V_CEO
V_EBO
I_C
I_CM
Value
-25
-25
-5
-3
-6
Unit
V
V
V
A
A
Thermal Characteristics
Characteristic
Power Dissipation @ T_A = 25°C (Note 3)
Thermal Resistance, Junction to Ambient Air (Note 1) @T_A = 25°C
Operating and Storage Temperature Range
Symbol
P_D
R_θJA
T_J, T_STG
Value
1
125
-55 to +150
Unit
W
°C/W
°C
Notes:
1. No purposefully added lead.
2. Diodes Inc.'s "Green" policy can be found on our website at http://www.diodes.com/products/lead_free/index.php.
3. Device mounted on FR-4 PCB, pad layout as shown on page 4 or in Diodes Inc. suggested pad layout document AP02001, which can be found on our
website at http://www.diodes.com/datasheets/ap02001.pdf.
DS31327 Rev. 3 - 2
1 of 4
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DPLS325E
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