DPLS160-7 Datasheet, PDF (1/4 Pages) Diodes Incorporated – Epitaxial Planar Die Construction

Features
• Epitaxial Planar Die Construction
• Complementary NPN Type Available (DNLS160)
• Surface Mount Package Suited for Automated Assembly
• Lead Free/RoHS Compliant (Note 1)
• "Green Device" (Note 2)
• Qualified to AEC-Q101 Standards for High Reliability
Mechanical Data
• Case: SOT-23
• Case Material: Molded Plastic, “Green” Molding
Compound. UL Flammability Classification Rating 94V-0
• Moisture Sensitivity: Level 1 per J-STD-020D
• Terminals: Finish ⎯ Matte Tin annealed over Copper
leadframe. Solderable per MIL-STD-202, Method 208
• Marking Information: See Page 4
• Ordering Information: See Page 4
• Weight: 0.008 grams (approximate)
DPLS160
LOW V_CE(SAT) PNP SURFACE MOUNT TRANSISTOR
Please click here to visit our online spice models database.
SOT-23
C
B
E
Schematic and Pin Configuration
Maximum Ratings @T_A = 25°C unless otherwise specified
Characteristic
Collector-Base Voltage
Collector-Emitter Voltage
Emitter-Base Voltage
Collector Current - Continuous
Peak Pulse Collector Current
Base Current (DC)
Symbol
V_CBO
V_CEO
V_EBO
I_C
I_CM
I_B
Value
-80
-60
-5
-1
-2
-300
Unit
V
V
V
A
A
mA
Thermal Characteristics
Characteristic
Power Dissipation (Note 3) @ T_A = 25°C
Thermal Resistance, Junction to Ambient (Note 3) @ T_A = 25°C
Operating and Storage Temperature Range
Symbol
P_D
R_θJA
T_J, T_STG
Value
300
417
-55 to +150
Unit
mW
°C/W
°C
Notes:
1. No purposefully added lead.
2. Diode’s Inc.’s “Green” policy can be found on our website at http://www.diodes.com/products/lead_free/index.php.
3. Device mounted on FR-4 PCB, 1 inch x 0.85 inch x 0.062 inch; pad layout as shown on page 4 or in Diodes Inc. suggested pad layout document
AP02001, which can be found on our website at http://www.diodes.com/datasheets/ap02001.pdf.
DS31389 Rev. 4 - 2
1 of 4
www.diodes.com
DPLS160
© Diodes Incorporated