DMP57D5UV Datasheet, PDF (1/5 Pages) Diodes Incorporated – DUAL P-CHANNEL ENHANCEMENT MODE MOSFET

Features
• Low On-Resistance
• ESD Protected Gate to 1kV
• Low Input Capacitance
• Fast Switching Speed
• Lead Free By Design/RoHS Compliant (Note 2)
• “Green” Device (Note 3)
• Qualified to AEC-Q 101 Standards for High Reliability
DMP57D5UV
DUAL P-CHANNEL ENHANCEMENT MODE MOSFET
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Mechanical Data
• Case: SOT-563
• Case Material: Molded Plastic, "Green" Molding Compound.
UL Flammability Classification Rating 94V-0
• Moisture Sensitivity: Level 1 per J-STD-020D
• Terminals: Finish ⎯ Matte Tin annealed over Copper
leadframe. Solderable per MIL-STD-202, Method 208
• Terminal Connections: See Diagram
• Marking Information: See Page 3
• Ordering Information: See Page 3
• Weight: 0.006 grams (approximate)
SOT-563
D₂
G₁
S₁
ESD protected to 1kV
TOP VIEW
Maximum Ratings @T_A = 25°C unless otherwise specified
Drain-Source Voltage
Gate-Source Voltage
Drain Current (Note 2)
Characteristic
Continuous
Continuous
S₂
G₂
D₁
TOP VIEW
Internal Schematic
Symbol
V_DSS
V_GSS
I_D
Value
-50
±8
-160
Units
V
V
mA
Thermal Characteristics @T_A = 25°C unless otherwise specified
Characteristic
Total Power Dissipation (Note 1)
Thermal Resistance, Junction to Ambient (Note 1)
Operating and Storage Temperature Range
Symbol
P_D
R_θJA
T_J, T_STG
Value
400
313
-55 to +150
Units
mW
°C/W
°C
Electrical Characteristics @T_A = 25°C unless otherwise specified
Characteristic
OFF CHARACTERISTICS (Note 4)
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate-Body Leakage
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
Static Drain-Source On-Resistance
Forward Transfer Admittance
Diode Forward Voltage
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Symbol Min Typ Max Unit
Test Condition
BV_DSS -50 ⎯ ⎯ V V_GS = 0V, I_D = -250μA
I_DSS
⎯ ⎯ -10 μA V_DS = -50V, V_GS = 0V
I_GSS
⎯ ⎯ ±500 nA V_GS = ±8V, V_DS = 0V
V_GS(th) -0.7 ⎯ -1.0 V V_DS = V_GS, I_D = -250μA
R_{DS (ON)}
⎯
⎯
4.6
6.0
6
8
Ω ^{VGS = -4V, ID = -100mA}
V_GS = -2.5V, I_D = -80mA
⏐Y_fs⏐ 100 ⎯ ⎯ mS V_DS = -5V, I_D = -100mA
V_SD
⎯ ⎯ -1.2 V V_GS = 0V, I_S = -100mA
C_iss
C_oss
C_rss
⎯ 29 ⎯
⎯ 7.3 ⎯
⎯ 2.5 ⎯
pF
pF V_DS = -25V, V_GS = 0V, f = 1.0MHz
pF
Notes:
1. Device mounted on FR-4 PCB, 1 inch x 0.85 inch x 0.062 inch; pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which
can be found on our website at http://www.diodes.com/datasheets/ap02001.pdf.
2. No purposefully added lead.
3. Diodes Inc’s “Green” policy can be found on our website at http://www.diodes.com/products/lead_free/index.php.
4. Short duration pulse test used to minimize self-heating effect.
DMP57D5UV
Document number: DS31540 Rev. 3 - 2
1 of 5
www.diodes.com
April 2009
© Diodes Incorporated