DMN55D0UT Datasheet, PDF (1/4 Pages) Diodes Incorporated – N-CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR

DMN55D0UT
Features
N-CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR
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Mechanical Data
• Low On-Resistance
• Very Low Gate Threshold Voltage
• Low Input Capacitance
• ESD Protected Gate to 2kV
• Lead Free/RoHS Compliant (Note 3)
• "Green" Device (Note 4)
• Qualified to AEC-Q101 Standards for High Reliability
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SOT-523
Case: SOT-523
Case Material: Molded Plastic, "Green" Molding Compound,
Note 6. UL Flammability Classification Rating 94V-0
Moisture Sensitivity: Level 1 per J-STD-020D
Terminals: Solderable per MIL-STD-202, Method 208
Terminal Connections: See Diagram
Lead Free Plating (Matte Tin Finish annealed over Alloy 42
leadframe).
Marking Information: See Page 3
Ordering Information: See Page 3
Weight: 0.002 grams (approximate)
Drain
D
ESD PROTECTED, 2kV
TOP VIEW
Maximum Ratings @T_A = 25°C unless otherwise specified
Characteristic
Drain-Source Voltage
Gate-Source Voltage
Drain Current (Note 1)
Pulsed Drain Current (Note 1)
Continuous
Thermal Characteristics
Characteristic
Total Power Dissipation (Note 1)
Thermal Resistance, Junction to Ambient
Operating and Storage Temperature Range
Gate
Gate
Protection Source
Diode
Equivalent Circuit
G
S
TOP VIEW
Symbol
V_DSS
V_GSS
I_D
I_DM
Value
50
±12
160
560
Units
V
V
mA
mA
Symbol
P_D
R_θJA
T_J, T_STG
Value
200
625
-55 to +150
Units
mW
°C/W
°C
Electrical Characteristics @T_A = 25°C unless otherwise specified
Characteristic
OFF CHARACTERISTICS (Note 2)
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate-Body Leakage
ON CHARACTERISTICS (Note 2)
Gate Threshold Voltage
Static Drain-Source On-Resistance
Forward Transconductance
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Symbol Min Typ Max Unit
Test Condition
BV_DSS 50 ⎯
⎯
V V_GS = 0V, I_D = 250μA
I_DSS
⎯ ⎯ 10 μA V_DS = 50V, V_GS = 0V
I_GSS
⎯
⎯
1.0
5.0
μA
V_GS = ±8V, V_DS = 0V
V_GS = ±12V, V_DS = 0V
V_GS(th) 0.7 0.8 1.0 V V_DS = V_GS, I_D = 250μA
⎯ 3.1 4
R_{DS (ON)}
⎯
4
5
Ω ^{VGS = 4V, ID = 100mA}
V_GS = 2.5V, I_D = 80mA
g_FS
180 ⎯ ⎯ mS V_DS = 10V, I_D = 100mA, f = 1.0KHz
C_iss
C_oss
C_rss
⎯ 25 ⎯ pF
⎯
5
⎯ pF VDS = 10V, VGS = 0V, f = 1.0MHz
⎯ 2.1 ⎯ pF
Notes:
1. Device mounted on FR-4 PCB, pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at
http://www.diodes.com/datasheets/ap02001.pdf.
2. Short duration pulse test used to minimize self-heating effect.
3. No purposefully added lead.
4. Diodes Inc.'s "Green" policy can be found on our website at http://www.diodes.com/products/lead_free/index.php.
DMN55D0UT
Document number: DS31330 Rev. 3 - 2
1 of 4
www.diodes.com
March 2008
© Diodes Incorporated