DMN32D2LV Datasheet, PDF (1/5 Pages) Diodes Incorporated – DUAL N-CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR

DMN32D2LV
DUAL N-CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR
Features
• Dual N-Channel MOSFET
• Low On-Resistance
• Very Low Gate Threshold Voltage, 1.2V max
• Low Input Capacitance
• Fast Switching Speed
• Low Input/Output Leakage
• Ultra-Small Surface Mount Package
• ESD Protected Gate
• Lead Free By Design/RoHS Compliant (Note 2)
• "Green" Device (Note 3)
Mechanical Data
• Case: SOT-563
• Case Material: Molded Plastic, “Green” Molding Compound.
UL Flammability Classification Rating 94V-0
• Moisture Sensitivity: Level 1 per J-STD-020
• Terminal Connections: See Diagram
• Terminals: Finish – Matte Tin annealed over Copper
leadframe. Solderable per MIL-STD-202, Method 208
• Marking Information: See Page 3
• Ordering Information: See Page 3
• Weight: 0.006 grams (approximate)
SOT-563
D₂
G₁
S₁
ESD PROTECTED
TOP VIEW
S₂
G₂
D₁
TOP VIEW
Schematic and Transistor Diagram
Maximum Ratings @T_A = 25°C unless otherwise specified
Drain Source Voltage
Gate-Source Voltage
Drain Current (Note 1)
Characteristic
Symbol
V_DSS
V_GSS
I_D
Value
30
±10
400
Unit
V
V
mA
Thermal Characteristics @T_A = 25°C unless otherwise specified
Total Power Dissipation (Note 1)
Thermal Resistance, Junction to Ambient (Note 1)
Operating and Storage Temperature Range
P_D
R_θJA
T_J, T_STG
400
313
-55 to +150
mW
°C/W
°C
Electrical Characteristics @T_A = 25°C unless otherwise specified
Characteristic
OFF CHARACTERISTICS (Note 4)
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate-Body Leakage
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
Static Drain-Source On-Resistance
Forward Transconductance
Source-Drain Diode Forward Voltage
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching Time
@ T_C = 25°C
Symbol Min
BV_DSS
30
I_DSS
⎯
I_GSS
⎯
V_GS(th)
0.6
⎯
R_{DS (ON)}
⎯
⎯
|Y_fs|
100
V_SD
0.5
C_iss
⎯
C_oss
⎯
C_rss
⎯
Turn-on Time
t_on
⎯
Turn-off Time
t_off
⎯
Typ
Max
Unit
Test Condition
⎯
⎯
V V_GS = 0V, I_D = 250μA
⎯
1
μA V_DS = 30V, V_GS = 0V
⎯
±10
±500
μA VGS = ±10V, VDS = 0V
nA V_GS = ±5V, V_DS = 0V
⎯
1.2
V V_DS = V_GS, I_D = 250μA
⎯
2.2
V_GS = 1.8V, I_D = 20mA
⎯
1.5
Ω V_GS = 2.5V, I_D = 20mA
⎯
1.2
V_GS = 4.0V, I_D = 100mA
⎯
⎯
mS V_DS =10V, I_D = 0.1A
⎯
1.4
V V_GS = 0V, I_S = 115mA
39
⎯
pF
10
⎯
pF
V_DS = 3V, V_GS = 0V
f = 1.0MHz
3.6
⎯
pF
11
⎯
nS V_DD = 5V, I_D = 10 mA,
51
⎯
nS V_GS = 5V
Notes:
1. Device mounted on FR-4 PCB, 1 inch x 0.85 inch x 0.062 inch; pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which
can be found on our website at http://www.diodes.com.
2. No purposefully added lead.
3. Diodes Inc.’s “Green” policy can be found on our website at http://www.diodes.com/products/lead_free/index.php.
4. Short duration pulse test used to minimize self-heating effect.
DMN32D2LV
Document number: DS31121 Rev. 6 - 2
1 of 5
www.diodes.com
April 2010
© Diodes Incorporated