DMN2005DLP4K_09 Datasheet, PDF (1/5 Pages) Diodes Incorporated – DUAL N-CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR

DMN2005DLP4K
DUAL N-CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR
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Features
Mechanical Data
• Low On-Resistance
• Very Low Gate Threshold Voltage, 0.9V Max.
• Fast Switching Speed
• Low Input/Output Leakage
• Ultra-Small Surface Mount Package
• Lead Free By Design/RoHS Compliant (Note 2)
• "Green" Device (Note 4)
• ESD Protected Gate
• Ultra Low Profile Package
• Case: DFN1310H4-6
• Case Material: Molded Plastic, “Green” Molding Compound.
UL Flammability Classification Rating 94V-0
• Moisture Sensitivity: Level 1 per J-STD-020
• Terminal Connections: See Diagram
• Terminals: Finish ⎯ NiPdAu annealed over Copper leadframe.
Solderable per MIL-STD-202, Method 208
• Marking Information: See Page 3
• Ordering Information: See Page 3
DFN1310H4-6
D₁
G₂ S₂
ESD protected
S₁ G₁
D₂
TOP VIEW
Internal Schematic
Maximum Ratings @T_A = 25°C unless otherwise specified
Characteristic
Symbol
Value
Unit
Drain-Source Voltage
V_DSS
20
V
Gate-Source Voltage
V_GSS
±10
V
Drain Current per element (Note 1)
Continuous
Pulsed (Note 3)
I_D
200
250
mA
Thermal Characteristics @T_A = 25°C unless otherwise specified
Characteristic
Total Power Dissipation (Note 1)
Thermal Resistance, Junction to Ambient
Operating and Storage Temperature Range
Symbol
P_D
R_θJA
T_J, T_STG
Value
350
357
-65 to +150
Unit
mW
°C/W
°C
Electrical Characteristics @T_A = 25°C unless otherwise specified
Characteristic
OFF CHARACTERISTICS (per element) (Note 5)
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate-Source Leakage
ON CHARACTERISTICS (per element) (Note 5)
Gate Threshold Voltage
Static Drain-Source On-Resistance
Forward Transfer Admittance
Symbol Min
Typ Max Unit
Test Condition
BV_DSS
20
I_DSS
⎯
I_GSS
⎯
⎯
⎯
V V_GS = 0V, I_D = 100μA
⎯
10
μA V_DS = 17V, V_GS = 0V
⎯
±5
μA V_GS = ±8V, V_DS = 0V
V_GS(th)
0.53
⎯
0.9
V V_DS = V_GS, I_D = 100μA
⎯
⎯
R_{DS (ON)}
⎯
⎯
⎯
0.9
1.5
0.85 1.7
1.2
1.7
2.4
3.5
2.5
3.5
V_GS = 4V, I_D = 10mA
V_GS = 2.7V, I_D = 200mA
Ω V_GS = 2.5V, I_D = 10mA
V_GS = 1.8V, I_D = 200mA
V_GS = 1.5V, I_D = 1mA
⏐Y_fs⏐
40
⎯
⎯
mS V_DS = 3V, I_D = 10mA
Notes:
1. Device mounted on FR-4 PCB.
2. No purposefully added lead.
3. Pulse width ≤10μS, Duty Cycle ≤1%.
4. Diodes Inc.'s "Green" policy can be found on our website at http://www.diodes.com/products/lead_free/index.php.
5. Short duration pulse test used to minimize self-heating effect.
DMN2005DLP4K
Document number: DS30801 Rev. 8 - 2
1 of 5
www.diodes.com
October 2009
© Diodes Incorporated