DMMT3904W_1 Datasheet, PDF (1/4 Pages) Diodes Incorporated – MATCHED NPN SMALL SIGNAL SURFACE MOUNT TRANSISTOR

SPICE MODEL: DMMT3904W
DMMT3904W
MATCHED NPN SMALL SIGNAL SURFACE MOUNT TRANSISTOR
Features
• Epitaxial Planar Die Construction
• Intrinsically Matched NPN Pair (Note 1)
• Small Surface Mount Package
• 2% Matched Tolerance, h_FE, V_CE(SAT), V_BE(SAT)
• Lead Free/RoHS Compliant (Note 3)
Mechanical Data
• Case: SOT-363
• Case Material: Molded Plastic. UL Flammability
Classification Rating 94V-0
• Moisture Sensitivity: Level 1 per J-STD-020C
• Terminals: Solderable per MIL-STD-202, Method 208
• Lead Free Plating (Matte Tin Finish annealed over Alloy 42
leadframe).
• Terminal Connections: See Diagram
• Marking Information: See Page 4
• Ordering & Date Code Information: See Page 4
• Weight: 0.015 grams (approximate)
A
C₂
E₂
E₁
BC
B₂
B₁
C₁
H
K
J
DF
L
SOT-363
Dim Min Max
A
0.10 0.30
B
1.15 1.35
C
2.00 2.20
D
0.65 Nominal
F
0.30 0.40
H
1.80 2.20
M
J
—
0.10
K
0.90 1.00
L
0.25 0.40
M
0.10 0.25
α
8°
All Dimensions in mm
Maximum Ratings @T_A = 25°C unless otherwise specified
Characteristic
Collector-Base Voltage
Collector-Emitter Voltage
Emitter-Base Voltage
Collector Current - Continuous
Power Dissipation (Note 2)
Thermal Resistance, Junction to Ambient (Note 2)
Operating and Storage Temperature Range
Symbol
V_CBO
V_CEO
V_EBO
I_C
P_d
R_θJA
T_j, T_STG
Value
60
40
6.0
200
200
625
-55 to +150
Notes:
1. Built with adjacent die from a single wafer.
2. Device mounted on FR5 PCB: 1.0 x 0.75 x 0.62 in.; pad layout as shown on suggested pad layout document AP02001,
which can be found on our website at http://www.diodes.com/datasheets/ap02001.pdf.
3. No purposefully added lead.
Unit
V
V
V
mA
mW
°C/W
°C
DS30311 Rev. 9 - 2
1 of 4
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DMMT3904W
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