74LVC574A Datasheet, PDF (1/11 Pages) NXP Semiconductors – Octal D-type flip-flop with 5-volt tolerant inputs/outputs; positive edge-trigger 3-State

74LVC574A
OCTAL D-TYPE FLIP-FLOP WITH 3 STATE OUTPUTS
Description
The 74LVC574A provides eight edge-triggered D-type flip-flops
featuring 3-state outputs designed specifically for driving highly
capacitive or relatively low-impedance loads. These devices are
particularly suitable for implementing buffer registers, input/output (I/O)
ports, bidirectional bus drivers, and working registers. On the positive
transition of the clock (CLK) input, the Q outputs are set to the logic
levels set up at the data (D) inputs. A buffered output-enable (OE)
input can be used to place the eight outputs in either a normal logic
state (high or low logic levels) or the high-impedance state. In the
high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and increased drive provide
the capability to drive bus lines without interface or pullup components.
OE does not affect internal operations of the latch. Old data can be
retained or new data can be entered while the outputs are in the high-
impedance state.
These devices feature inputs and outputs on opposite sides of the
package that facilitate printed circuit board layout.
The device is designed for operation with a power supply range of
1.65V to 3.6V. The device is fully specified for partial power down
applications using I_OFF.
Features
• Supply Voltage Range from 1.65V to 3.6V
• Sinks or Sources 24mA at V_CC = 3V
• CMOS Low Power Consumption
• I_OFF Supports Partial-Power Down Operation
• Inputs or Outputs Accept Up to 5.5V
• Inputs Can Be Driven by 3.3V or 5V Allowing for Mixed Voltage
Applications
• Schmitt Trigger Action at All Inputs
• Typical V_OLP (Quiet Output Ground Bounce) less than 0.8V with
V_CC = 3.3V and T_A = +25°C
• Typical V_OHV (Quiet Output Dynamic VOH) greater than 2.0V
with V_CC = 3.3V and T_A = +25°C
• ESD Protection Tested per JESD 22
ƒ Exceeds 200-V Machine Model (A115)
ƒ Exceeds 2000-V Human Body Model (A114)
ƒ Exceeds 1000-V Charged Device Model (C101)
• Latch-Up Exceeds 250mA per JESD 78, Class I
• All devices are:
ƒ Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
ƒ Halogen and Antimony Free. “Green” Device (Note 3)
Pin Assignments
Applications
• General Purpose Logic
• Bus Driving
• Power Down Signal Isolation
• Wide Array of Products Such as:
ƒ PCs, Notebooks, Netbooks, Ultrabooks
ƒ Networking Computer Peripherals, Hard Drives, CD/DVD
ROM
ƒ TV, DVD, DVR, set top box
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen and Antimony free,
"Green" and Lead-Free.
3. Halogen and Antimony free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
74LVC574A
Document number: DS35898 Rev. 1 - 2
1 of 11
www.diodes.com
July 2014
© Diodes Incorporated